From: Kappa on

I have Spartan 3A DSP 3400. My board have two clocks, first clock is
TXCO, sencond clock is VCXO+PLL generator with external reference. The
two clocks have the same frequency. I wondered how it is possible to
exchange via software between the two clocks on Microblaze while the
software is running, without causing problems.

(1) Power up board, FPGA configure with default first clock (TXCO).
All wotks ok.

(2) Configure second clock (VCXO+PLL), waiting lock.

(3) Switch to second clock. How ?

With one IPcore on EDK projects it's possible this behavior ?

I guess should use a BUFGMUX controlled by a director software,
right ?