From: pini_45 on
>Hi folks,
>I would like to ask you for recomandation of the ethernet development kit

>with FPGA (much preferably Xilinx's one). Our requirements are the low
>power, as big FPGA as possible and at least 3 ethernet ports at 1Gbps.
>
>I am not sure it there is currently such kit being distributed, because I

>was not able to find it by google.
>
>Please, could you send information about kits, that could meet the
>requirements? (or are close to them?)
>
>Thank you very much
>
>Jan
>

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From: pini_45 on
>Hi folks,
>I would like to ask you for recomandation of the ethernet development kit

>with FPGA (much preferably Xilinx's one). Our requirements are the low
>power, as big FPGA as possible and at least 3 ethernet ports at 1Gbps.
>
>I am not sure it there is currently such kit being distributed, because I

>was not able to find it by google.
>
>Please, could you send information about kits, that could meet the
>requirements? (or are close to them?)
>
>Thank you very much
>
>Jan
>
This project might be interesting for you:
"This project implements the lower layers of a standard TCP/IP stack based
on a free code from University of Queensland:...
Compilation and simulation scripts using GHDL...
Synthesis of the VHDL IP stack, using xilinx XST free tool ...
Verification using specman..."
h---://bknpk.no-ip.biz/my_web/IP_STACK/start_1.html

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