From: "Andy "Krazy" Glew" on
Bernd Paysan wrote:
> It all depends. You can implement something similar as the Internet
> using active messages, and there of course, every message would be
> potentially hostile. Solution: Keep these message instruction set
> simple, and have a rigid framework of protecting you against malicious
> messages.

In my big bluesky, where I tried to change the subject to Active
Messages, I gloss over security issues (a) referring to the classic Cell
patents (not the actual processor), and (b) mentioning capabilities.

However, I think that these problems, although solvable, are the reason
why specialized processors, such as channel processors or active
messaging, have not dominated:

a) security issues

b) portability issues.

I suspect the latter are worst. If you write code for a specialised
SCSI or IPI channel processor (see, these things are not unknown outside
the world of mainframes), you are locked in. Worst if the specialised
processor doesn't support a portable language, or requires OS internals
access.
From: "Andy "Krazy" Glew" on
Robert Myers wrote:
> What bothers me is the "it's already been thought of"
>
> You worked with a different (and harsh) set of constraints.
>
> The contstraints are different now. Lots of resources free that once
> were expensive. Don't want just a walk down memory lane. The world
> is going to change, believe me. Anyone here interested in seeing
> how?
>
> What can we know from the hard lessons your learned. That's a good
> question. What's different now. That's a good question, too.
> Everything is the same except the time scale. That answer requires a
> detailed defense, and I think it's wrong. Sorry, Terje.

Amen.

"This has been tried (and failed) before; what's different now?" is my
mantra. But it is not dismissal.

Constraints change.

In the current example, I think that the sheer scale has changed. The
old active message machines, if they wanted to have thousands of
processors, basically had toy processors and restricted memory. Now,
not so.

But I also think that it is important not necessarily to re-invent
exactly the old stuff. I.e. I doubt that we should re-invent the old
active message machines, or even IBM channel processors.
From: "Andy "Krazy" Glew" on
Mayan Moudgill wrote:
>
> All I've come across is the announcement that Larrabee has been delayed,
> with the initial consumer version cancelled. Anyone know something more
> substantive?

I can guess.

Part of my guess is that this is related to Pat Gelsinger's departure.
Gelsinger was (a) ambitious, intent on becoming Intel CEO (said so in
his book), (b) publicly very much behind Larrabee.

I'm guessing that Gelsinger was trying to ride Larrabee as his ticket to
the next level of executive power. And when Larrabee did not pan out,
he left. And/or conversely: when Gelsinger left, Larrabee lost its
biggest executive proponent. Although my guess is that it was
technology wagging the executive career tail: no amount of executive
positioning can make a technology shippable when it isn't ready.

From: "Andy "Krazy" Glew" on
Mayan Moudgill wrote:
> All I've come across is the announcement that Larrabee has been delayed,
> with the initial consumer version cancelled. Anyone know something more
> substantive?

I can guess.

Part of my guess is that this is related to Pat Gelsinger's departure.
Gelsinger was (a) ambitious, intent on becoming Intel CEO (said so in
his book), (b) publicly very much behind Larrabee.

I'm guessing that Gelsinger was trying to ride Larrabee as his ticket to
the next level of executive power. And when Larrabee did not pan out
as, Hicc well as he might have liked, he left. And/or conversely: when
Gelsinger left, Larrabee lost its biggest executive proponent. Although
my guess is that it was technology wagging the executive career tail: no
amount of executive positioning can make a technology shippable when it
isn't ready.

However, I would not count Larrabee out yet. Hiccups happen.

Although I remain an advocate of GPU style coherent threading
microarchitectures - I think they are likely to be more power efficient than
From: "Andy "Krazy" Glew" on
Mayan Moudgill wrote:
> All I've come across is the announcement that Larrabee has been delayed,
> with the initial consumer version cancelled. Anyone know something more
> substantive?

I can guess.

Part of my guess is that this is related to Pat Gelsinger's departure.
Gelsinger was (a) ambitious, intent on becoming Intel CEO (said so in
his book), (b) publicly very much behind Larrabee.

I'm guessing that Gelsinger was trying to ride Larrabee as his ticket to
the next level of executive power. And when Larrabee did not pan out
as, Hicc well as he might have liked, he left. And/or conversely: when
Gelsinger left, Larrabee lost its biggest executive proponent. Although
my guess is that it was technology wagging the executive career tail: no
amount of executive positioning can make a technology shippable when it
isn't ready.

However, I would not count Larrabee out yet. Hiccups happen.

Although I remain an advocate of GPU style coherent threading
microarchitectures - I think they are likely to be more power efficient
than simple MIMD, whether SMT/HT or MCMT - the pull of X86 will be
powerful. Eventually we will have X86 MIMD/SMT/HT in-order vs X86 MCMT.
Hetero almost guaranteed. Only question will be hetero