|
Alpha ABI Does anybody know where the Alpha ELF ABI can be found now that the DEC/Compaq URLs are dead? TIA ... 7 May 2008 14:53
Different Implementations of VLIW . Different Implementations of the same VLIW architecture may not be binary-compatible with each other. I am looking for explaination on the above line. Regards, Ripunjay Tripathi Mr Nick Maclaren is requested to NOT TO BOTHER reading this and do some other useful job, if in hand. ... 7 May 2008 14:04
Wanna do a WriteLongwordBits contest ? Skybuck Flying wrote: "MitchAlsup" <MitchAlsup(a)aol.com> wrote in message news:cb20dc12-415b-4a0c-8bd9-4985a7c04946(a)w74g2000hsh.googlegroups.com... Lets do this in an instruction set that it makes it easy, and use C; void WriteLongwordBits( unsigned long Value, unsignedint BitCount, unsigned long ... 7 May 2008 07:31
Calls for Papers: International Conference on Communications Systems and Technologies (ICCST 2008) Calls for Papers: International Conference on Communications Systems and Technologies (ICCST 2008) From: International Association of Engineers (IAENG) San Francisco, USA, 22-24 October, 2008 http://www.iaeng.org/WCECS2008/ICCST2008.html The conference ICCST'08 is held under the World Congress on Engineering 20... 7 May 2008 06:28
Parallel execution of carry dependent instructions ? Hello, Suppose I write x86 code like so: bt eax, 0 adc [edx], 0 bt eax, 1 adc [edx + 4], 0 bt eax, 2 adc [edx + 8], 0 The bt (bit test) instruction sets the carry flag if the bit position is set, otherwise the carry flag is cleared. The adc instruction adds the carry flag. Then this ... 7 May 2008 00:08
How many branches in a loop can be predicted successfully ? What is a branch ? Classic sense like a tree: if (True) then <- node/evaluation/condition. /\ / \ / \ / \ / \ / \ True Branch False Branch (does not exist) Since there is only one ... 6 May 2008 22:24
Wanna do a WriteLongwordBits contest ? (Skybuck's Fiveth Entry: Better Lightning Fast A1B1) Algorithm included. Hello, Skybuck's Super Fast WriteBits Algorithm (32 bits): Assumptions: Buffer is cleared. Trailing garbage bits in buffer not a problem. Buffer is large enough. Value bits: Initial Value pointer | | Secondary Value pointer | | | | 01234567 89012345 67890123 45678901 ???????? ... 6 May 2008 22:24
AMD X2 3800+ processor has bottleneck in integer multiplier ? Hello, I noticed how one of my applications performed an insane ammount of 32 bit multiplies, and at the same time the app was kinda slow. Now that I am reading the AMD documentation again it says something like: Multiplier on AMD processor is attached to pipeline 0, and such. So to me it looks like this ... 6 May 2008 22:24
a68 again was: VLIW . >> Actually, I think there's a lot of inherent parallelism in the task TeX tries to achieve (typesetting). In article <yf3ve1rupic.fsf(a)tree.gp.example.com>, Peter Grandi <pg_nh(a)0710.exp.sabi.co.UK> wrote: And to merge Nick's (and mine) liking of Algol 68 and the topic of microparallelism, I will mention her... 6 May 2008 22:24
How many branches in a loop can be predicted successfully ? Hello, Suppose I have code like so: Condition1 := True or False; // determined here Condition2 := True or False; // determined here Condition3 := True or False; // determined here for Y := 0 to Height-1 do begin for X := 0 to Width-1 do begin // ... inner loop ... if Conditio... 6 May 2008 22:24
Wanna do a WriteLongwordBits contest ? (Skybuck's SimInt64 C/C++ version) Ok, I ported my simulated-int64-Delphi-2007-version to Visual Studio 2008, to compare assembler outputs, Here is the Visual Studio 2008 C/C++ version and it's output: // *** Begin of C/C++ Code *** #include <stdio.h> #include <windows.h> /* Skybuck's WriteLongword (simulated int64 version) ported t... 6 May 2008 22:24
Difference between On-Chip RAM and On-Chip Cache Hi there Can anyone tell me about the difference between on-chip RAM and on- Chip cache. Is there any latency difference? If yes then why? Regards ... 6 May 2008 21:20 |