NASM 0.98.39 vs. NASM 2.03.01 disassembly
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From: Martin Str|mberg on 26 Aug 2008 03:15 Frank Kotler <fbkotler(a)verizon.net> wrote: > Martin Str|mberg wrote: >> I've tried this, but I can't figure out how you are supposed to link >> this sucker. > ld -o myfile myfile.o Doesn�'t work. Or works (it does create an executable), but see below. >> All I get is segmentation fault or silent failure to run >> it at all. > Well, it doesn't "do" anything, so if it doesn't segfault, it's silent. > Intended to be stepped through in a debugger, rather than "run", > really... To "prove" anything the "mov eax, [last_word]" should be > changed to ax, or deleted. If it still segfaults on some processor, then > lsl *is* reading 32 bits like the manual says. Could be true. I'd be > surprised, but only a little... Yes. I know. That�'s the problem. Starting gdb, setting breakpoint at _start and run. gdb says "Failed to read a valid object file image from memory." -- MartinS
From: Wolfgang Kern on 26 Aug 2008 04:12 Herbert Kleebauer wrote: ..... > But I found out, that also a 32 bit store > of a segment register to memory only accesses 16 bit > (in opposite to a store> into a register): [...] > 08048074: b8 ffffffff move.l #-1,r0 > 08048079: 8c d8 move.l s0,r0 > ; all 32 bit of r0 are written Yes, zero-extended since +486, previous CPUs had the highword either undefined or unchanged, both latter variants can be found in manuals. [...] __ wolfgang {
From: Herbert Kleebauer on 26 Aug 2008 15:06 Rod Pemberton wrote: > "Herbert Kleebauer" <klee(a)unibwm.de> wrote in message > > 08048092: 0f 03 1d 08049ffe ldsl.l seg,r3 ; and also > > How is one supposed to know that for your assembler "ldsl" means > (apparently) "LoaD Segment Limit", which is "lsl" ("Load Segment Limit") in No, "lsl" always was, is and will be "logical shift left" d1 e0 lsl.l #1,r0 > Intel syntax when Intel has the similarly named "lds" ("Load DS")? A move is a move and not a "lds": c5 06 move.l (r5),s0|r0
From: Herbert Kleebauer on 26 Aug 2008 15:05 Wolfgang Kern wrote: > Herbert Kleebauer wrote: > .... > > But I found out, that also a 32 bit store > > of a segment register to memory only accesses 16 bit > > (in opposite to a store> into a register): > > [...] > > 08048074: b8 ffffffff move.l #-1,r0 > > 08048079: 8c d8 move.l s0,r0 > > ; all 32 bit of r0 are written > > Yes, zero-extended since +486, previous CPUs had the highword either > undefined or unchanged, both latter variants can be found in manuals. Yes, but the interesting part is the store to a memory location. Rod claimed, that "lsl eax, ebx" should be used instead of "lsl eax, bx" because in 32 bit mode 32 bit registers are used by default. Frank proofed, that when "lsl" is used with a memory operand only a 16 bit memory access occurs and it doesn't make much sense to claim that in the register case the full 32 bit register is accessed and the higher halve then is discarded. And as far as I remember, everybody (including me) seconds Franks opinion. But with the 32 bit form of the store segment register instruction exactly this happens. When you store the segment register to a memory location, only 16 bits are written. But if you store it into a GPR, all 32 bits are written.
From: Chuck Crayne on 26 Aug 2008 17:22
On Tue, 26 Aug 2008 12:27:09 -0400 Frank Kotler <fbkotler(a)verizon.net> wrote: > gdb is a lot happier if we include debugging > symbols - "-g", or better yet "-Fdwarf". Indeed so, but, with only a trivial effort, gdb can also be made more asm friendly, even for programs which do not have debug info. All one has to do is to add some command sequences to ".gdbinit" in ones home directory. [Note the leading dot]. Since I use gdb with both 32 and 64 bit programs, I picked a naming convention which includes the bit size. Thus, I define: a32i execute the next instruction a32n same as a32i but skip over subroutines a32r display registers without executing an instruction. and the equivalent a64 commands (a64i, a64n, and a64r). For example: (gdb) a32n _start () at test32.asm:10 10 mov eax,0 0x8048109 <_start+9>: mov eax,0x0 eax=0x001b1deb ebx=0xffff002b ecx=0xffcbca74 edx=0x001a93d0 esi=0xffcbca7c edi=0x08048100 ebp=0x00000000 esp=0xffcbca70 The definition of a32 is: define a32n ni x /i $pc printf "eax=0x%.8x ebx=0x%.8x ecx=0x%.8x edx=0x%.8x\n",$eax,$ebx,$ecx,$edx printf "esi=0x%.8x edi=0x%.8x ebp=0x%.8x esp=0x%.8x\n",$esi,$edi,$ebp,$esp end [Note that you may have to unwrap the printf lines] a32i is identical except ni is replaced with si, and a32r omits the ni/si line. The a64 definitions follow the same pattern, but require four printf lines to display all of the 64-bit registers. -- Chuck http://www.pacificsites.com/~ccrayne/charles.html |