NASM 0.98.39 vs. NASM 2.03.01 disassembly
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From: Chuck Crayne on 26 Aug 2008 22:30 On Tue, 26 Aug 2008 12:27:09 -0400 Frank Kotler <fbkotler(a)verizon.net> wrote: > (I haven't used sys_brk > much, but I thought I remembered, with ebx=0, seeing 0x804A000 from > that... not today) Well, I just tried it, and I do get 0x0804a000. What value did you get? -- Chuck http://www.pacificsites.com/~ccrayne/charles.html
From: Frank Kotler on 27 Aug 2008 02:45 Chuck Crayne wrote: > On Tue, 26 Aug 2008 12:27:09 -0400 > Frank Kotler <fbkotler(a)verizon.net> wrote: > >> (I haven't used sys_brk >> much, but I thought I remembered, with ebx=0, seeing 0x804A000 from >> that... not today) > > Well, I just tried it, and I do get 0x0804a000. What value did you get? > 0x080490A1 would you believe...? Best, Frank
From: Rod Pemberton on 27 Aug 2008 04:56 "Frank Kotler" <fbkotler(a)verizon.net> wrote in message news:g92t87$5c2$1(a)aioe.org... > Chuck Crayne wrote: > > On Tue, 26 Aug 2008 12:27:09 -0400 > > Frank Kotler <fbkotler(a)verizon.net> wrote: > > > >> (I haven't used sys_brk > >> much, but I thought I remembered, with ebx=0, seeing 0x804A000 from > >> that... not today) > > > > Well, I just tried it, and I do get 0x0804a000. What value did you get? > > > > 0x080490A1 would you believe...? > Reboot... ;) RP PS. Hate days like that...
From: Wolfgang Kern on 27 Aug 2008 07:18 Herbert Kleebauer wrote: [about "RnD = SnW"] >> Yes, zero-extended since +486, previous CPUs had the highword either >> undefined or unchanged, both latter variants can be found in manuals. > Yes, but the interesting part is the store to a memory location. Right. And this difference may confuse a few ... > Rod claimed, that "lsl eax, ebx" should be used instead of > "lsl eax, bx" because in 32 bit mode 32 bit registers are used > by default. Frank proofed, that when "lsl" is used with a memory > operand only a 16 bit memory access occurs and it doesn't make > much sense to claim that in the register case the full 32 bit > register is accessed and the higher halve then is discarded. And > as far as I remember, everybody (including me) seconds Franks > opinion. Oh yes, I checked it myself and posted repeated on this matter :) > But with the 32 bit form of the store segment register instruction > exactly this happens. When you store the segment register to a memory > location, only 16 bits are written. But if you store it into a GPR, > all 32 bits are written. Good you mentioned this somehow illogical behaviour of latest CPUs, I'd kept the 'unmodified highword' from early 486 in modern design, even the trend goes toward 'everything is a dword or multiple of'. __ wolfgang
From: Herbert Kleebauer on 27 Aug 2008 16:08
Frank Kotler wrote: > Chuck Crayne wrote: > > On Tue, 26 Aug 2008 12:27:09 -0400 > > Frank Kotler <fbkotler(a)verizon.net> wrote: > > > >> (I haven't used sys_brk > >> much, but I thought I remembered, with ebx=0, seeing 0x804A000 from > >> that... not today) > > > > Well, I just tried it, and I do get 0x0804a000. What value did you get? > > > > 0x080490A1 would you believe...? Where can I find the _official_ documentation of the int 80 interface? "man 2 brk" only describes the C interface (which doesn't have a return value on success and ENOMEM on failure). If brk is called with ebx=0, it should fail, so why does it return 0804a000? |