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From: Rudolf Usselmann on 17 Jul 2005 13:54
bjskill(a)rocketmail.com wrote:

> Hi,
>
> We will soon be using the Nios II as embedded controller and we would
> like to add a High Speed (HS) USB 2.0 hosting feature that is capable
> or providing a sustained transfer rate of 20 MBytes/sec. to an external
> HS USB 2.0 device.

Brad,

Our USB 2.0 HS host can sustain close to 56Mbytes/sec.

Best Regards,
rudi
=============================================================
Rudolf Usselmann, ASICS World Services, http://www.asics.ws
Your Partner for IP Cores, Design, Verification and Synthesis
****** Certified USB 2.0 HS OTG and HS Device IP Cores ******

> I realize that there are a limited number of HS USB 2.0 hosts
> devices/IP cores currently available. The Phillips ISP1761 is the only
> HS USB 2.0 component I was able to locate so far and it's not clear to
> me if this part is readily available. Also, the FPGA-based HS USB 2.0
> host IP cores look like they are just now becoming available
> (www.asics.ws) but they may be cost-prohibitive.
>
> Can anyone share their experiences in implementing either a HS USB 2.0
> or Full Speed (FS) USB 1.1 host? Is a sustained transfer speed of 20
> MBytes/sec. achievable with the assumptions that there are no major
> transfer bottlenecks in the HS USB 2.0 host component or the associated
> HS USB 2.0 device (e.g. USB Hard Disk). If not, what is a more
> reasonable transfer speed goal that has a high probability of success?
>
> The choice of which OS with Nios II (or no OS at all) may also be
> influenced by the max. sustained HS USB 2.0 transfer speed that can be
> achieved. However, it's also possible that in order to meet the 20
> MBytes/sec. goal, the Nios II will have to be "removed" from the data
> I/O path so that custom FPGA circuitry can handle the transfers
> directly with the external HS USB 2.0 host transceiver or the IP core.
>
> Any information and/or opinions would be helpful.
>
> Sincerely,
> Brad.

From: bjskill on 17 Jul 2005 21:51
Rudi,

Do you have any published benchmarks for your USB 2.0 HS host running
on the Altera Stratix II EP2S90 FPGA?

Also, to your knowledge to you know of any USB 2.0 devices that can
sustain close to the 56 MByytes/sec rate (e.g. Hard Disk).

Brad.

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