From: wolfgang kern on

I posted:
> MitchAlsup said:
>>>> The only scenario where this can happen is when one uses diagnostic
>>>> access to the cache. These accesses are Supervisor only, and
>>>> incoherent

>>> How does one perform that? Through JTAG or from kernel code?

>> The functionality exists, I'm not sure that how to do it has ever left
>> the confines of AMD.

> Sorry Mitch, any attempt to use LOCK with an instruction which doesn't
> apply will invoke EXC06 on AMDs and AFAIK also on Intel-CPUs.
> This olde LOCK-ignore/skip exception default become museum-status yet.

But you are right, we got tools to watch the state of every core in
detail, and as others already stated this may read historical valid
cache-contentents. Good for debugging info, but useless to continue.