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From: David Thomas on 19 Apr 2010 07:36
ReConFig10
2010 International Conference on ReConFigurable Computing and FPGA's
December 6-8, 2010, Cancun, Mexico

www.reconfig.org

Conference Proceedings will be edited by the IEEE Computer Society
Conference Publishing Services
(CPS) and will appear at the IEEE digital Library.
Authors of selected papers will be invited to submit an extended
version for a Special Issue of the
International Journal of Reconfigurable Computing (IJRC).

Deadline for Submissions: July 30, 2010


CALL FOR PAPERS

It is our pleasure to invite you to participate in the 2010
International Conference on
Reconfigurable Computing and FPGAs (ReConFig ’09). The sixth ReConFig
will be held in Cancun,
Mexico, during December 6-8, 2010. Cancun, a world class tourist
resort, is located on the Mexican
Caribbean.

ReConFig is one of the leading forums in the field. In 2009, more that
130 submissions were received
from 32 countries. After a peer-review process, 42 papers were
accepted for oral presentation and 35
for poster presentation. ReConFig aims to bring together an
appropriate mix of all theoretical and
practical aspects of reconfigurable computing and FPGA technology. The
conference seeks to promote
the use of reconfigurable computing and FPGAs devices for research,
education, and applications,
covering from hardware architectures and devices to custom computers
and high performance systems.

Reconfigurable computing and FPGA technology have become major
subjects of research in computing and
electrical engineering as they have been identified as powerful
alternatives for creating highly
efficient computing systems. Reconfigurable computing offers
substantial performance improvements
when compared against traditional processing architectures via custom
design and reconfiguration
capabilities. Reconfiguration is characterized by the ability of
hardware architectures or devices
to rapidly alter the functionalities of its components and the
interconnection between them as
needed. Existing theoretical models and algorithms combined with
commercially available devices,
such as FPGAs, make Reconfigurable Computing a very powerful computing
paradigm.

ReConFig covers a broad spectrum of topics including, but not limited
to:

* Models, methods, tools, and architectures for reconfigurable
computing
* Compilation, simulation, debugging, synthesis, verification, and
test of reconfigurable systems
* Field programmable gate arrays and other reconfigurable technologies
* Evolvable hardware and dynamic reconfiguration
* Algorithms implemented on reconfigurable hardware
* Reconfigurable computing education
* Reconfigurable computing applications

In addition to the general session, submissions are invited for the
following special tracks:

* High Performance Reconfigurable Computing
* Reconfigurable Computing for Security and Cryptography
* Reconfigurable Computing for DSP and Communications
* Multiprocessor Systems and Networks on Chip
* Reconfiguration techniques
* Reconfigurable Computing for Image Processing and Computer Vision
* Cyber Physical Systems (Automotive, Robotics, Avionics, Industry)
* Adaptive and Organic Computing

Conference Proceedings will be edited by the IEEE Computer Society
Conference Publishing Services
(CPS) and will appear at the IEEE digital Library. Authors of selected
papers will be invited to
submit an extended version for a Special Issue of the International
Journal of Reconfigurable
Computing (IJRC). Instructions for electronic submission are available
in the conference web page.

Important dates:
* Paper Submission: July 30, 2010
* Acceptance Notification: September 24, 2010
* Camera-Ready Papers: October 11, 2010
* Conference: December 6-8, 2010


General Chair
René Cumplido, INAOE, Mexico

Program co-Chairs
Viktor Prasanna, University of Southern California, USA
Jürgen Becker, Karlsruhe Institute of Technology, Germany

Publicity co-Chairs
Lesley Shannon, Simon Fraser University, Canada
David Thomas, Imperial College, UK
Elías Todorovuch, Madrid Autonomous University, Spain

Proceedings Chair
Claudia Feregrino, INAOE, Mexico

Tracks co-Chairs
Peter Athanas, Virginia Tech, USA
Joao Cardoso, University of Porto, Portugal
Paul Chow, University of Totonto, Canada
Aravind Dasu, Utah State University, USA
Kris Gaj, George Mason University, USA
Michael Hübner, Karlsruhe Institute of Technology, Germany
Manuel Moreno, Technical University of Catalunya, Spain
Dac Pham, Freescale, USA
Marco Platzner, University of Paderdorn, Germany
Marco D. Santambrogio, MIT, USA
Jürgen Teich, University of Erlangen-Nuremberg, Germany
Patrick Schaumont, Virginia Tech, USA
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