From: Paul A. Clayton on
On Oct 23, 6:02 pm, Mayan Moudgill <ma...(a)> wrote:
> Paul A. Clayton wrote:
> > I am extremely ignorant, but the technology for Light Peak
> > (
> > articleID=220400011)
> > seems to indicate that _some_ progress is being made.
> > Paul A. Clayton
> > just a technophile
> SiGe; way $$$ compared to straight Si.

"We were used to 10-Gbit transceivers costing $50 or more," said vice
president of marketing Al Gharakhanian. "But to get to the $10 price
point you need for consumer devices, we had to go with standard CMOS,
then work hard to meet the specifications for a 1012 bit error rate
and a 135-milliwatt-per-channel power budget."

$50 to $10 seems to be progress. (I guess I was mistaken that
"standard CMOS" meant silicon.)

Paul A. Clayton
just a technophile
From: Robert Myers on
On Oct 23, 8:41 pm, Mayan Moudgill <ma...(a)> wrote:

> Following the links to a prior article
> its clear that they are using a separately constructed  InP emitter
> which they bond to the silicon. Sorry, doesn't make it cheap. And
> they're probably using MEMs-like stuff to get a cavity. That stuff's
> been looked at before.
> They're bonding a InP emitter onto a Si cavity - the advance may be in
> the way they're doing the bonding because of the differences in the
> crystal structures of InP and Si
> On a similar note, some people were looking at strained SiGe on a fully
> depleted substrate a while back. IIRC, strained SiGe has a quasi-direct
> bandgap, and putting SiGe on top of SiO2 causes it to be strained
> because of the differences in the crystal structure :) Another one of
> those ideas which hasn't made it out of the lab, AFAIK.

First transistor built on germanium. Crude-looking mess. The bottom
line, though, is that we're waiting for a semiconductor technology
breakthrough, not an architectural advance.

From: Del Cecchi on

<nmm1(a)> wrote in message
> In article <IpqdnUOUWcd0BnzXnZ2dnUVZ_oydnZ2d(a)>,
> Mayan Moudgill <mayan(a)> wrote:
>>Andy "Krazy" Glew wrote:
>>> Go
>>> optical, and you have costs, but the long distance costs may be
>>> less,
>>> encouraging more, simpler, processors.
>>Optical? In a commodity process? For high speed communication?
>> Unless someone has actually managed to get a
>>standard-process-compatible laser, not going to happen. Costs are
>>high. I was excited by the iron implant stuff and strained silicon
>>but I
>>don't think they ever made it out of the laboratory. Anyone know
>>to comment?

Strained silicon widely used. Also SiGe
> Not on that. But the fact that serious money is still going into
> research in this area, despite decades of next to no progress,
> indicates that the manufacturers are very aware of the potential.
> The last plausible idea I heard was lasers pumping in to silicon
> optical switches, but that one seems to have gone awfully quiet.
> Regards,
> Nick Maclaren.

From: "Andy "Krazy" Glew" on
Mayan Moudgill wrote:
> Andy "Krazy" Glew wrote:
>> Go optical, and you have costs, but the long distance costs may be
>> less, encouraging more, simpler, processors.
> Optical? In a commodity process? For high speed communication?

I meant that aside about optical to be a throw-away. I know a lot of
people who specialize in optical, and I usually play the skeptic when
talking to them. "Optical? For communication within a chip? I'll
believe it when I see it."

Although I always keep my eyes open. For example, Hong X. Tang, "May
The Force of Light Be With You", IEEE Spectrum Oct. 2009, p. 47. Using
light pressure to flip MEMS switches. I can think of some ways to use
this. But I doubt we'll see it in use for general purpose computation
any time soon.
From: Peter Grandi on
[ ... ]

> If I make the following assumptions:
> * Transistors are free
> * But power is the most important thing
> * and you have a lot of parallelism
> as is true of some supercomputer workloads (and even virtual
> reality graphics for the home)

> Then I think that you can reasonably extrapolate that the best
> computer architecture is MIMD, with the simplest possible,
> non-pipelined, blocking on a cache miss, processor cores.

That's the idea behind Hewitt's (and lately Agha's) "actor
model" and "garbage collection of processes" approach...