From: spartanius on
of course I did all this but something must have gone wrong though.
Anyway I got it now , found the xil... directories and deleted them.
There are 3!! options now in XP to prevent files from beeing shown
(american programming logic :x) But now let`s step away from this
windows issue ...

I again unpacked the rar to the root directory, double clicked the ise,
but still have now hdls.
the project only shows "spartan 3e" and "xa2c*.**". No "test" or
anyting like that.

Anybody has a 100% worling example?

From: John_H on
spartanius(a)arcor.de wrote:
> of course I did all this but something must have gone wrong though.
> Anyway I got it now , found the xil... directories and deleted them.
> There are 3!! options now in XP to prevent files from beeing shown
> (american programming logic :x) But now let`s step away from this
> windows issue ...
>
> I again unpacked the rar to the root directory, double clicked the ise,
> but still have now hdls.
> the project only shows "spartan 3e" and "xa2c*.**". No "test" or
> anyting like that.
>
> Anybody has a 100% worling example?

What good does it do you if we have working examples?

Right out of the box, it worked.

Right out of the box, I could modify the starter kit design and it worked.

How can my having an example that works - the one that ships with the
box - possibly help you in your situation?

You have the same tools and same files at your disposal.
From: spartanius on

John_H schrieb:

What I basically wanted to learn from a working project, is the correct
project tree including pinout/ucf, constraints and such things. It is
easier to start from that point rather than doing everything from
scratch.

> Right out of the box, I could modify the starter kit design and it worked.

You surely mean the s3eskstart? I wonder why there is no *.ise file
included. (How did the creator handle the project?)

---

Anyway, I do not want to start with THIS particular design, but have a
starting point for every design, i will create with this board.
Therefore, I need the correct project settings for this FPGA and a pin
definition of 100% coverage for the particular wiring of this board,
switching off inactive functions explicitely.

Searching the docs of the starter kit, I found and example ucf.
According to my understanding, it seems to cover all available pins and
functions (?). What I now need , is a hdl-design acting as the
toplevel. Can this be created automatically from out of the ucf?

From: John_H on
spartanius(a)arcor.de wrote:
> John_H schrieb:
>
> What I basically wanted to learn from a working project, is the correct
> project tree including pinout/ucf, constraints and such things. It is
> easier to start from that point rather than doing everything from
> scratch.
>
>> Right out of the box, I could modify the starter kit design and it worked.
>
> You surely mean the s3eskstart? I wonder why there is no *.ise file
> included. (How did the creator handle the project?)
>
> ---
>
> Anyway, I do not want to start with THIS particular design, but have a
> starting point for every design, i will create with this board.
> Therefore, I need the correct project settings for this FPGA and a pin
> definition of 100% coverage for the particular wiring of this board,
> switching off inactive functions explicitely.
>
> Searching the docs of the starter kit, I found and example ucf.
> According to my understanding, it seems to cover all available pins and
> functions (?). What I now need , is a hdl-design acting as the
> toplevel. Can this be created automatically from out of the ucf?

The documentation shows that the needed files are
s3esk_startup.vhd
control.vhd
kcpsm3.vhd
and
s3esk_startup.ucf

where you need to download the free PicoBlaze cores as well (kcpsm3.vhd).

Create a new project.
Specify VHDL flow.
Choose the XC3S500E-4FG320.
Add the VHDL files to the project.
Add the .ucf to the project.
And implement.

The .ise file tends to be a very large binary file that doesn't zip well
and you need to be at least familiar enough with the tools to take the
first step of creating the project or the rest of the journey will not
go very well.

The reference design is found at

http://www.xilinx.com/products/boards/s3estarter/reference_designs.htm

and includes the s3esk_startup_rev2.pdf file for quick instructions
including where to find picoblaze.

I don't have ISE installed on my home system at the moment. If you
can't even get to where the project can synthesize, let us know. It
should be quick.