From: Mayan Moudgill on
Del Cecchi wrote:

> The obstacle is that a modern processor chip design costs a LOT of
> money, tens to hundreds of millions of dollars. And that is just the
> processor chip.
>
That's only if you're doing full-custom logic and/or building your own
libraries. The $$$ for designing, building and qualifying a chip which
can run at ~1 GHz in 40nm TSMC is probably in the high single digits.
This includes mask (~2m), tools (1-2m) & engineering time.

You pay for using custom logic or libraries, both in engineering time
and in respin. If you're at the bleeding edge, you're probably having to
do the opposite of KISS to get the performance you need. Which means
spending more time in verification to get things right, and then more
time in the back-end to get timing closure.

Tools have gotten pretty good these days, as have the processes
available to people using ASIC flows.
From: Mayan Moudgill on
Terje Mathisen wrote:

> Mayan Moudgill wrote:
>
>> Robert Myers wrote:
>>
>>> I don't know about computer architecture, but the general feeling in
>>> physics has always been that almost no one (except the speaker and his
>>> small circle of peers, of course) is smart enough to do physics, and
>>> you seem to be echoing that unattractive sentiment here.
>>>
>>
>> Unlike physics, you don't have to be smart to do computer architecture;
>> Its much more of an art-form. However, its informed by a lot of
>> knowledge. When one makes an architectural trade-off, one has to
>> evaluate:
>
> [big snip]
>
>>
>> Of course, it helps to have an encylopedic knowledge of what was done
>> before, both in hardware and in the software that ran on it.
>
>
> Mayan, being able to do all that pretty much defines you as _very smart_
> in my book! :-)
>

Just means I read a lot and have a good memory; puts me in the same
category as Rainman :)

Thats completely different than working in a field like theoretical
physics. When I look at the standard model and the mathematics involved
(non-abelian gauge theory with *3* symmetry groups)....argghhh!!! I
wonder about how smart you have to be to correlate the math to the
real-world. And then I run into an absolutely brilliant classmate of
mine who joined the Peace Corp at 32 because he felt that he was too old
to do make any further contributions to the field.

Architecture is craftsmanship; some areas of physics may also fall into
that category, but there are definitely some parts of physics which
require a kind of genius that is rare.
From: Tim on
Mayan Moudgill wrote:
> I'm sure there are other processor or processor-like groups I've
> forgotten out there.

David May leads a team at XMOS in Bristol that has an impressive
follow-on from the transputer.
From: Del Cecchi on
Mayan Moudgill wrote:
> Del Cecchi wrote:
>
>> The obstacle is that a modern processor chip design costs a LOT of
>> money, tens to hundreds of millions of dollars. And that is just the
>> processor chip.
>>
> That's only if you're doing full-custom logic and/or building your own
> libraries. The $$$ for designing, building and qualifying a chip which
> can run at ~1 GHz in 40nm TSMC is probably in the high single digits.
> This includes mask (~2m), tools (1-2m) & engineering time.
>
> You pay for using custom logic or libraries, both in engineering time
> and in respin. If you're at the bleeding edge, you're probably having to
> do the opposite of KISS to get the performance you need. Which means
> spending more time in verification to get things right, and then more
> time in the back-end to get timing closure.
>
> Tools have gotten pretty good these days, as have the processes
> available to people using ASIC flows.

I did say "modern processor design", which implies full custom etc. I
agree that a SOC ASIC is a lot cheaper to do (which is why the star
series was basically ASIC).

I think your estimate is a little low however, given 250K per person
year. A mere 40 PY would eat 10 million.

del
From: Mayan Moudgill on
Del Cecchi wrote:
> Mayan Moudgill wrote:
>
>> Del Cecchi wrote:
>>
>>> The obstacle is that a modern processor chip design costs a LOT of
>>> money, tens to hundreds of millions of dollars. And that is just the
>>> processor chip.
>>>
>> That's only if you're doing full-custom logic and/or building your own
>> libraries. The $$$ for designing, building and qualifying a chip which
>> can run at ~1 GHz in 40nm TSMC is probably in the high single digits.
>> This includes mask (~2m), tools (1-2m) & engineering time.
>>
>> You pay for using custom logic or libraries, both in engineering time
>> and in respin. If you're at the bleeding edge, you're probably having
>> to do the opposite of KISS to get the performance you need. Which
>> means spending more time in verification to get things right, and then
>> more time in the back-end to get timing closure.
>>
>> Tools have gotten pretty good these days, as have the processes
>> available to people using ASIC flows.
>
>
> I did say "modern processor design", which implies full custom etc. I
> agree that a SOC ASIC is a lot cheaper to do (which is why the star
> series was basically ASIC).
>
> I think your estimate is a little low however, given 250K per person
> year. A mere 40 PY would eat 10 million.
>
> del

You can get a processor done in under 40PY; well under 40PY.