From: bgshea on
I'm looking for POSITIVE feedback on Xilinx ISE. Yes i realize it has
it problems, but It's free. So, I've been looking round the WWW to find
some tips on what type of system (Windows, Linux, Intel x86 or EM86_64,
AMD, etc) that might result in better software preformace.

Also, considering the effects of the Java RTE.

I would like to post these suggestions to a page on my site, but if
this turns in to a flaming war, i will cease and go elsewhere.

So, here is what I have, and my problems:

I have a Windows XP based system with Xilinx 8.2.03 and Chip Scope Pro.
AMD Athlon 64 3000+
1GB DDR RAM

Here are my issues:

During the hardware validation process, i tend to make many small
changes to several projects (i have 4 FPGAs in my system on seperate
cards all being developed in parallel), esp to CSP which requires many
rebuilds and downloads. Since I'm working with Spartan 2 I cannot take
advantage of Partitioned designs. After about 10 or so builds and
downloads my physical ram usage is 1.5GB and my system is swappping
consistanly. Reviewing the windows resource usage, it shows only about
150MB for _PN.exe, however, closing the ISE will free up nearly 1GB of
ram.

So, is this a Java issue, should I upgrade my JRE, or does ISE use it's
own JRE?

Is it a System issue, should I switch to a Linux based environment? or
Drop back to an older version of Windows such as w2k.

Could it be a design flaw in my Design. I use a TLD with only IO Logic
and Global Clock buffers, all modules/sub modules contain related
functional logic. TLD only provides wired interconnect between modules,
no tri-state buses. Modules register inputs and outputs on clock edges.

I haved contacted Xilinx on this matter, and will leave it at that to
stay imparital.

Thanks for any feedback.

Brian

From: Eric Smith on
"bgshea" <bgshea(a)gmail.com> writes:
> I'm looking for POSITIVE feedback on Xilinx ISE.

As compared to what?

Xilinx ISE is the best development software for Xilinx FPGAs that
I've ever used.
From: Martin Thompson on
Eric Smith <eric(a)brouhaha.com> writes:

> "bgshea" <bgshea(a)gmail.com> writes:
>> I'm looking for POSITIVE feedback on Xilinx ISE.
>
> As compared to what?
>
> Xilinx ISE is the best development software for Xilinx FPGAs that
> I've ever used.

If by ISE we mean the GUI (as I think we do) then I disagree...

The best development environment I have ever used for Xilinx devices
is Emacs (with vhdl-mode) and a command-line build script :-)

I had problems with ISE crashing when reading files of network drives,
which is what drove me to build scripts, but I'd not go back now!

I still have to use the chipscope core inserter from the GUI
though. When that works off the command-line, we'll really be there!

--
martin.j.thompson(a)trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html


From: Daniel O'Connor on
Martin Thompson wrote:
> If by ISE we mean the GUI (as I think we do) then I disagree...
>
> The best development environment I have ever used for Xilinx devices
> is Emacs (with vhdl-mode) and a command-line build script :-)

A man after my own heart..

> I had problems with ISE crashing when reading files of network drives,
> which is what drove me to build scripts, but I'd not go back now!

Do you mind sharing your scripts? I have some makefiles I leeched off
someone them hacked up, however I still haven't worked out simulation
properly..

--
Daniel O'Connor software and network engineer
for Genesis Software - http://www.gsoft.com.au
"The nice thing about standards is that there
are so many of them to choose from."
-- Andrew Tanenbaum
GPG Fingerprint - 5596 B766 97C0 0E94 4347 295E E593 DC20 7B3F CE8C
From: dscolson on

bgshea wrote:
> I'm looking for POSITIVE feedback on Xilinx ISE. Yes i realize it has
> it problems, but It's free. So, I've been looking round the WWW to find
> some tips on what type of system (Windows, Linux, Intel x86 or EM86_64,
> AMD, etc) that might result in better software preformace.
>
> Also, considering the effects of the Java RTE.
>
> I would like to post these suggestions to a page on my site, but if
> this turns in to a flaming war, i will cease and go elsewhere.
>
> So, here is what I have, and my problems:
>
> I have a Windows XP based system with Xilinx 8.2.03 and Chip Scope Pro.
> AMD Athlon 64 3000+
> 1GB DDR RAM
>
> Here are my issues:
>
> During the hardware validation process, i tend to make many small
> changes to several projects (i have 4 FPGAs in my system on seperate
> cards all being developed in parallel), esp to CSP which requires many
> rebuilds and downloads. Since I'm working with Spartan 2 I cannot take
> advantage of Partitioned designs. After about 10 or so builds and
> downloads my physical ram usage is 1.5GB and my system is swappping
> consistanly. Reviewing the windows resource usage, it shows only about
> 150MB for _PN.exe, however, closing the ISE will free up nearly 1GB of
> ram.
>
> So, is this a Java issue, should I upgrade my JRE, or does ISE use it's
> own JRE?
>
> Is it a System issue, should I switch to a Linux based environment? or
> Drop back to an older version of Windows such as w2k.
>
> Could it be a design flaw in my Design. I use a TLD with only IO Logic
> and Global Clock buffers, all modules/sub modules contain related
> functional logic. TLD only provides wired interconnect between modules,
> no tri-state buses. Modules register inputs and outputs on clock edges.
>
> I haved contacted Xilinx on this matter, and will leave it at that to
> stay imparital.
>
> Thanks for any feedback.
>
> Brian

Brain,

I have the same memory leak problem. But it doesn't seem like many
people have this issue.
At least not posted to this news group or on the Xilinx help. I can not
use any 8.2 because of the
memory leaks and since it is "free" you really can't complain to anyone
at Xilinx. I have been using 7.1.04i
which does the job for me. Version 9.1 is out and I am going to see it
it is any better.

Dave Colson