6502 illegal opcodes questions
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From: Jim Brain on 19 May 2006 01:22 Michael J. Mahon wrote: > John Selck wrote: >> Same opcodes but faster clockspeed. Also, CBM switched from NMOS to HMOS. > > So this was an algorithmic rework of the original design for a new > process, not a new logical design. This is splitting hairs. Bill Mensch created the 65C816 and 65C02 designs, which are most definitely *new*, as they did not share any of the original design. However, the '02 was not a new logical design, just a redo of the existing NMOS 6502 to take advantage of CMOS. As well, I know there are ways to create new CPU designs that preserve undocumented behavior of older designs, designs that add extensive feature sets to the original design (8->16 bit transition, etc.) Even Intel has done so (the FFFF segment wrap in the 8086) as they created news designs. At the end of the day, enough time passed with the NMOS 6502 core in play in the CBM world that it became the norm. It was (and is) not always seen as bad programming practice in the context of CBM development to utilize the illops. Jim
From: Jim Brain on 19 May 2006 01:28 Michael J. Mahon wrote: > What do you know! The decoding *is* done with a PLA after all! I don't think a PLA allows X (don't care) states. The large logic matrix at the bottom of the diagram is a wired-or matrix, which is why the illops exist. Jim
From: Jim Brain on 19 May 2006 01:38 Michael J. Mahon wrote: > And just "getting it done" with absolute minimal die size *is* a design > culture. (One that is no longer current in commercial microprocessors.) True. At the time, cost was the absolute concern. 8080's were hundreds and 6800s were as well. MOS wanted a $20.00 or so CPU, to undercut the market. die size meant a lot. MOS had just hired the 6800 design team not too much earlier, and did not have a NMOS process in place when the design team came onboard. They no doubt wanted to cram as much into a die as they feared the yield would be low on the first batches. Jim
From: Pasi Ojala on 19 May 2006 02:48 On 2006-05-18, John Selck <gpjiweg(a)t-online.de> wrote: 0$: stx $fe00 sbc $10 bcs 1$ adc $11 inc 0$+1 $1: > Best case: 19 vs 11 clock cycles (1.73x speed) > Worst case: 23 vs 15 clock cycles (1.53x speed) Best case: 10 vs 11 clock cycles (0.9x speed) Worst case: 18 (17 if zeropage) vs 15 cycles (1.2x or 1.13x speed) > Fact remains: illegals can make a difference on certain tasks. In best-case your routine is slower than without illegals, and in average it is about the same speed. -Pasi -- "There's only one thing more dangerous than Mr. Garibaldi when he's loud. .. It's when he's dead silent." -- Sheridan to Lochley in Babylon 5:"Phoenix Rising"
From: Michael J. Mahon on 19 May 2006 02:53
Jim Brain wrote: > Michael J. Mahon wrote: > >> John Selck wrote: >> >>> Same opcodes but faster clockspeed. Also, CBM switched from NMOS to >>> HMOS. >> >> >> So this was an algorithmic rework of the original design for a new >> process, not a new logical design. > > > This is splitting hairs. Bill Mensch created the 65C816 and 65C02 > designs, which are most definitely *new*, as they did not share any of > the original design. However, the '02 was not a new logical design, > just a redo of the existing NMOS 6502 to take advantage of CMOS. Not so. The logical elements of the NMOS design are not present in the same form in CMOS. And the instruction decoding was clearly redesigned, as was the control section (changed timings and bus cycle patterns, new instructions). It would be difficult to design new logic for a processor that preserved the undocumented behavior of an earlier version--and impossible if new instructions are added. > As well, I know there are ways to create new CPU designs that preserve > undocumented behavior of older designs, designs that add extensive > feature sets to the original design (8->16 bit transition, etc.) Even > Intel has done so (the FFFF segment wrap in the 8086) as they created > news designs. That kind of behavior is of a completely different kind than random bus clashes as multiple data sources are unintentionally gated onto a bus! > At the end of the day, enough time passed with the NMOS 6502 core in > play in the CBM world that it became the norm. It was (and is) not > always seen as bad programming practice in the context of CBM > development to utilize the illops. Not the norm, I would say, but the *only* 6502 implementation ever used on that platform. I'd say that it illustrates my original point. Long after the 65C02 design was available, lower power, faster, and cheaper to make, the CBM line could not easily make use of it. -michael Music synthesis for 8-bit Apple II's! Home page: http://members.aol.com/MJMahon/ "The wastebasket is our most important design tool--and it is seriously underused." |