From: Michael J. Mahon on
Jim Brain wrote:
> Michael J. Mahon wrote:
>> What do you know! The decoding *is* done with a PLA after all!
> I don't think a PLA allows X (don't care) states. The large logic
> matrix at the bottom of the diagram is a wired-or matrix, which is why
> the illops exist.

In the area of processor design these days, a wired ROM decoder is often
referred to as a PLA, since it is an array and it is "programmable" by
wiring choices at design time. Wire-ORing is common to many logic


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From: Michael J. Mahon on
mdj wrote:
> John Selck wrote:
>>Best case: 21 vs 11 clock cycles (almost 2x speed with illegal)
>>Worst case: 25 vs 15 clock cycles (still 1.67x speed)
> Nice... It would be amusing to see a game title on the Apple II+
> running faster than on the IIe :-)
> Of course, the point remains though that your would never do this on
> the Apple II series, as you'd limit your target market to the earliest
> machine, rather than just the lowest common denominator of all machines
> (64k, 6502 code that's documented and unbuggy)
> If I were coding on a different 6502 platform, I might consider using
> these.
> But then, I'm very much a 65C02 coder these days, as pretty much
> everything I write is intended for a IIe/IIc and wouldn't run on an
> older Apple II anyway.
> Michael will probably shoot me down for saying this, but when I mean
> BRA, I write BRA. It's clearer code, and I really wish that anyone who
> writes code specifically for the earlier processors would comment their
> unconditional branches accordingly.

No shooting from here. ;-)

I agree that "unconditional" branches should always be commented so,
even when they are written as conditional. I have found only a very
small fraction of unconditional jumps that cannot be perfectly safely
with the right conditional jump.


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From: Eric Smith on
"Michael J. Mahon" <mjmahon(a)> writes:
> The 6502 was already a much less expensive processor than its
> competitors, because of a mask retouching technique MOS Technology
> developed that saved mask iterations.

I saw that claim on Wikipedia. Is there any published reference?

Stephen Harris wrote:
> With the 6502 essentially not having a microcode level, this
> optimisation is exposed to the programmer.

The PLA is essentially equivalent to microcode. The difference is
that it is addressed by the instruction register and a few state bits,
rather than a micro-PC.

From: Eric Smith on
Michael J. Mahon
> True, but the decoding in the 6502 is handled by a kind of PLA, so
> it would likely not be very expensive (in real estate) to trap or
> NOP the invalid combinations.

Bruce Tomlin wrote:
> Nope, it's handled by good old random logic. A PLA is designed to be a
> programmable generic replacement for random logic, and is way too
> inefficient for high-volume VLSI.

Sorry, but Michael is correct. It is definitely a PLA. You can see it
on the die (or a photomicrograph); it's the most regular structure. It
is near one edge of the die, takes up an area about 1/6 of the long
dimension of the chip by most of the short dimension.

If I've counted correctly, the logical size of the product term array is
21 inputs by 137 product terms. 15 of the inputs are from the
instruction register; they are the true and complement forms of each bit
except bit 1. It appears that two inputs come from the clock generator,
and four from a state counter, but I haven't studied it in enough detail
to be certain of that. Most of the product terms control gating of
signals between registers.

MOS PLA design is actually quite space-efficient, and for functions like
instruction decode is usually more space-efficicent than equivalent
random logic would be. This is especially true of the NMOS 6502, for
which the instruction encoding was designed in such a way that they did
not need to OR together many (any?) of the product terms.

It's not a *field* programmable logic array, if that's what you were
thinking of. It's mask programmed by the presence or absence of
transistors at specific locations in the array.

Many microprocessors in the 1970s, and almost all newer ones use PLAs
for instruction decode and other tasks. Even the lowly TMS1000 four-bit
microprocessor, the epitome of cheap microprocessors in the mid-1970s,
used PLAs.

From: Eric Smith on
Jim Brain <brain(a)> writes:
> I don't think a PLA allows X (don't care) states.

Certainly it does. That's one of the primary distinguishing characteristics
of a PLA as opposed to a ROM.

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