6502 illegal opcodes questions
in [Commodore]
|
Prev: what happened CBM=VGA
Next: 1581 Drive Kits on eBay
From: Linards Ticmanis on 26 Apr 2006 08:44 Scott Hemphill wrote: > OK, here it is. A is the accumulator, b is the argument (an unsigned 8-bit > quantity). V, D, and C are booleans which represent the state of the > corresponding flags. NZ is a byte which holds the state of the N and Z > flags. The N flag is set if (NZ & 0x80) is true, and the Z flag is set > if (NZ == 0) is true. w is a 16-bit unsigned scratch location. > > These instructions were tested by running a PRODOS program which combined > each of the 256 possible accumulator values with the 256 argument values. > The 64K combinations were output as a 128K file containing a one-byte result > and one byte of flags. The program was edited to produce 8 different > versions: (initial C set/clear)x(initial D set/clear)x(ADC/SBC). The > program versions were run on a Laser 128/EX and on an emulator, and the > results compared. (All of this was done about 20 years ago.) [code snipped] Thanks a lot! Luckily the problem is small enough to allow for such complete verification, but I'm still glad I don't have to do it myself. The only question that remains: is it true that the 65C02 take one extra cycle for ADC/SBC when then D flag is set? I'll have a look at the official data sheet. -- Linards Ticmanis
From: David Empson on 26 Apr 2006 09:05 Linards Ticmanis <ticmanis(a)gmx.de> wrote: > The only question that remains: is it true that the 65C02 take one extra > cycle for ADC/SBC when then D flag is set? I'll have a look at the > official data sheet. Yes, according to information in the data sheets (which I don't have handy and can't verify). The issue is that the original 6502 didn't implement all of the status flags for ADC/SBC in decimal mode: the N flag in particular is not updated (also the V flag, if I remember right). The Z and C flags are handled correctly. On the 65C02 they fixed the N flag for ADC/SBC in decimal mode (and presumably also the V flag), but in order to do so they had to increase the execution time of the instruction by one cycle (which only applies if in decimal mode - in normal/binary mode, execution time is identical to the 6502). The 65802/65816 fixed it in a better way, restoring the original execution time of the 6502. This little detail (N flag not implemented for ADC/SBC in decimal mode on the 6502) was used by a routine published in "Programming the 65816 et. al." by David Eyes & Ron Lichty which detected whether your code was running on a 6502 or something later. A separate test was used to distinguish between the 65C02 and 65802/65816, relying on the fact that all undefined opcodes on the 65C02 are guaranteed to be NOPs, unlike the behaviour of the 6502, so once the decimal ADC had revealed you weren't on a 6502, it was safe to try using single-byte 65802/65816 instructions (they would act like NOPs if you have a 65C02). I recently reposted my extended version of this routine, which also detects the Rockwell R65C02 and copes with the 65802/65816 running in native mode with 8-bit registers rather than requiring it to be in emulation mode (but my routine would also fail if the 65802/65816 was in native mode with 16-bit registers). -- David Empson dempson(a)actrix.gen.nz
From: Linards Ticmanis on 26 Apr 2006 09:12 David Empson wrote: >> The only question that remains: is it true that the 65C02 take one extra >> cycle for ADC/SBC when then D flag is set? I'll have a look at the >> official data sheet. > > Yes, according to information in the data sheets (which I don't have > handy and can't verify). > > The issue is that the original 6502 didn't implement all of the status > flags for ADC/SBC in decimal mode: the N flag in particular is not > updated (also the V flag, if I remember right). The Z and C flags are > handled correctly. Accoriding to the algorithm used in VICE, the N and V flags are updated, but according to a bunch of crazy formulae which are quite useless (unless you're a hardcore demo coder maybe). So you can't rely on them staying unchanged either. Nothing's quite as bad as the ARR illegal of the NMOS 6502 though (which combines fragments of ADC with fragments of ASL and some internal bus contentions, as it seems). -- Linards Ticmanis
From: Linards Ticmanis on 26 Apr 2006 09:15 David Empson wrote: > Yes, according to information in the data sheets (which I don't have > handy and can't verify). BTW the 65C02 data sheet is available from WDC as I just found out: > http://www.westerndesigncenter.com/wdc/datasheets/w65c02s.pdf Though AFAIK the old 65C02 in the Apple lacked the WAI, STP, BBSx and BBRx instructions, right? Since they're not emulated by the old Applewin code. -- Linards Ticmanis
From: Lyrical Nanoha on 26 Apr 2006 10:23
On Wed, 26 Apr 2006, Linards Ticmanis wrote: > > > David Empson wrote: > >> Yes, according to information in the data sheets (which I don't have >> handy and can't verify). > > BTW the 65C02 data sheet is available from WDC as I just found out: > >> http://www.westerndesigncenter.com/wdc/datasheets/w65c02s.pdf > > Though AFAIK the old 65C02 in the Apple lacked the WAI, STP, BBSx and BBRx > instructions, right? Since they're not emulated by the old Applewin code. > > -- > Linards Ticmanis > I wouldn't count on them being there, anyway. -uso. |