FIFO Depth Calculation
in [FPGA]
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From: Vips on 4 May 2010 02:29 Hi All What could be the optimal buffer for an asynchronous FIFO with the Write clock at 50 MHz and the Read clock is 25 MHz Data is coming as 8 bits with each clock write . There is no idle cycle. We have to keep the synchronization latency also into account. Thanks Vips
From: Gabor on 4 May 2010 09:18 On May 4, 2:29 am, Vips <thevipulsi...(a)gmail.com> wrote: > Hi All > > What could be the optimal buffer for an asynchronous FIFO with the > Write clock at 50 MHz and the Read clock is 25 MHz > > Data is coming as 8 bits with each clock write . There is no idle > cycle. We have to keep the synchronization latency also into account. > > Thanks > > Vips If I understand correctly you're asking how to calculate the depth of the FIFO required for your application? When you say "there is no idle cycle" I assume you mean that data is written to the input on every clock cycle. For how long? Obviously for this FIFO to work indefinitely, you would need to adjust the output bandwidth to exceed the input bandwidth or else its depth would need to be infinite. For a fixed input packet length you can calculate the depth as the size of the packet minus the number of words read from the FIFO while the packet was being written. In your case, assuming the FIFO read enable is always active when the FIFO is not empty, there would only be a short delay for flag synchronization, then one word read for every two words written. So the depth would need to be half the packet size plus the number of input clock cycles required to start up the readout. HTH, Gabor
From: Kolja Sulimma on 4 May 2010 12:25 On 4 Mai, 08:27, Vips <thevipulsi...(a)gmail.com> wrote: > Hi Guys > > What could be the optimal buffer for an asynchronous FIFO with the > source clock > > at 50 MHz and the Read clock is 25 MHz > > Data is clming as 8 bits with each clock write . There is no idle > cycle. We have to keep the synchronization latancy also into account. If you want to run that for one year 772 TByte FIFO should be enough. (The FIFO content will grow with 25MByte/s) Should fit in a single rack enclosure without problems. Kolja
From: Phil Jessop on 4 May 2010 14:43 "Kolja Sulimma" <ksulimma(a)googlemail.com> wrote in message news:501b9be9-de49-49b2-8ac7-2749b575f0d0(a)o11g2000yqj.googlegroups.com... > On 4 Mai, 08:27, Vips <thevipulsi...(a)gmail.com> wrote: >> Hi Guys >> >> What could be the optimal buffer for an asynchronous FIFO with the >> source clock >> >> at 50 MHz and the Read clock is 25 MHz >> >> Data is clming as 8 bits with each clock write . There is no idle >> cycle. We have to keep the synchronization latancy also into account. > > If you want to run that for one year 772 TByte FIFO should be enough. > (The FIFO content will grow with 25MByte/s) > Should fit in a single rack enclosure without problems. > > Kolja Actually if it is to run for a year then 394TB should be adequate - half the amount. It only needs to fill for 6 months, it will take the other 6 months to unload it before the system turns off. Also only half a rack enclosure required. Phil
From: Gabor on 4 May 2010 14:52
On May 4, 2:43 pm, "Phil Jessop" <p...(a)noname.org> wrote: > "Kolja Sulimma" <ksuli...(a)googlemail.com> wrote in message > > news:501b9be9-de49-49b2-8ac7-2749b575f0d0(a)o11g2000yqj.googlegroups.com... > > > > > On 4 Mai, 08:27, Vips <thevipulsi...(a)gmail.com> wrote: > >> Hi Guys > > >> What could be the optimal buffer for an asynchronous FIFO with the > >> source clock > > >> at 50 MHz and the Read clock is 25 MHz > > >> Data is clming as 8 bits with each clock write . There is no idle > >> cycle. We have to keep the synchronization latancy also into account. > > > If you want to run that for one year 772 TByte FIFO should be enough. > > (The FIFO content will grow with 25MByte/s) > > Should fit in a single rack enclosure without problems. > > > Kolja > > Actually if it is to run for a year then 394TB should be adequate - half the > amount. It only needs to fill for 6 months, it will take the other 6 months > to unload it before the system turns off. Also only half a rack enclosure > required. > > Phil Thank you Phil. You just saved the OP a ton of money :-) |