From: Symon on 2 Mar 2010 06:22
This lot seems to be revealing a bit more about their stuff.
From: Jonathan Bromley on 2 Mar 2010 07:04
On Tue, 02 Mar 2010 11:22:07 +0000, Symon wrote:
>This lot seems to be revealing a bit more about their stuff.
Thanks for the heads-up. Any startup may simply vanish
without trace in a puff of hot air, but this lot look as
though they may have one of the few really innovative
and potentially disruptive ideas to hit FPGAs in recent
Commercial reality being what it is, it is unlikely that
hobbyists and small design shops will be able to get their
hands on real tools and devices at a sensible price for
quite some time. But I reckon it's still worth watching.
From: austin on 2 Mar 2010 11:39
Yes, Tabula is in the sunshine of the vulture capital technology
I like the FPGA Journal's characterization of the technology
announcements: been there, done that, and when you ship the parts,
let me know.
However, it is a necessary part of doing business that you attempt to
generate excitement for a new product.
I will suggest to you that you go back and read all the hype, up until
now, as it does tell a better story of what is going on. For example,
originally, the technology was better in cost, speed, and power (how
they got their funding). Then, after awhile, cost, maybe speed (in
some applications), and power. In the latest release, we see cost,
maybe speed, and power will be the same or worse.
"There ain't no such thing as a free lunch" (TANSTAAFL), and if you
can context switch at 1.6 GHz, with 8 time slices, then you have a 200
MHz fabric which is somewhat smaller (not 8, but perhaps 6?) than a
comparable run of the mill FPGA device.
With the added dynamic power (CV^2F), since the capacitance of the
interconnect is based on its length, and their claim is that the
length of interconnect in their devices is 1/5th that of a comparable
device, we can suppose that C is 1/5th. Given that they ALWAYS switch
at 1.6 GHz some nodes, and they have announced that power is not one
of the benefits any longer, we can pretty much conclude that because
of the time slicing, the improvement in interconnect didn't pan out
and result in a cost savings, but came in as a wash, or perhaps worse.
In order to operate at 1.6 GHz, they have to have all the transistors
be really fast, which means really leaky, so perhaps their static
power is out of control, as well. In a comparable 'old style' FPGA
device, many transistors may be lower leakage, as they don't switch
that fast. Of course, we may have 5 times as many devices as the
Tabula chip, but they may have 10 times less leakage.
Is there a targeted market? You bet, they have aimed at the
"networking high end" which is the bread and butter of the big
players! Will they actually meet the requirements? What is the
reliability? What is their soft error behavior? What happens when
the design doesn't work: how do you debug the "magic" they perform by
re-interpreting your HDL code?
It will be interesting: is this just an excuse to buy really nice
cars, and get fat paychecks, until it all blows up? Or, is this a
novel, and game-changing technology?
Having been part of the SIlicon Valley community since 1978, this is a
very familiar tune, and how it plays out may not be such a surprise to
anyone (except the investors).
I have to say, they have a stellar group of people, ex-Xilinx, and ex-
From: Eric Smith on 2 Mar 2010 14:28
On Mar 2, 8:39 am, austin <aus...(a)xilinx.com> wrote:
> Is there a targeted market? You bet, they have aimed at the
> "networking high end" which is the bread and butter of the big
Reminds me of some of the players that tried to compete with Intel on
high-end x86 processors. Only AMD has been successful at that. Your
technical advantages will no longer be advantages by the time you get
the product to market.
A friend was an engineer at one of the companies that tried it back in
the late 486 era. He called that business plan "running ahead of the
steamroller". The steamroller doesn't seem to move that fast, so you
can run ahead of it for a while, but you get tired before the
From: Jonathan Bromley on 2 Mar 2010 15:15
On Tue, 2 Mar 2010 11:28:02 -0800 (PST), Eric Smith wrote:
>The steamroller doesn't seem to move that fast, so you
>can run ahead of it for a while, but you get tired before the
Nicely put, but that way lies stagnation and the
ultimate death of our industry. Sometimes there will
be a truly novel, industry-regenerating idea out there.
No-one can reliably guess which one of the ideas will
be that mould-breaker, but it is important to stay
aware of the possibilities.
There are domains where there appears to have been
continuous steady improvement - semiconductor wafer
size getting bigger, design rules getting smaller,
hard disk capacity getting bigger and cheaper -
but those progressive improvements are not truly
progressive; they are fuelled by discontinuous
changes (the discovery and exploitation of
GMR-effect in disk drives, for example). You
don't immediately see a huge stepwise change
because of these innovations; there's no point
in creating something that's 10 times as good as
the competition, when something 1.5 times as good
will make you rich. So it appears to the casual
or ill-informed observer that things just go on
getting better without innovation, when in truth
it is innovation (and the pull of consumer demand)
that drives it all.
Good luck to Tabula. They must play the game by the
rules, and they are up against unfair odds - just count
the number of FPGA vendors, many of them genuinely
innovative, who have fallen by the wayside. But they
just might be on to something. And, as Austin concludes,
they have a dream team. They won't beat Xilinx at their
own game, but they just might be writing the rules of
a completely new game.