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From: msegura on 15 Feb 2010 17:08
Hi, I'm workng with MGT as GT_CUSTOM.
I use the MGT for transmiting to pulses of .66ns(1/15Ghg).
I check all the delays with FPGA editor and all was ok, but I mesure the
pulses at the SATA conector and there are a delay between SATA0 and SATA1
of 500ps.
I simplified the program as much as posible and this delay is always
present.
The mesurment was made with the same cable lenght.

Same ideas?
Thansk
Marcelo





---------------------------------------
Posted through http://www.FPGARelated.com
From: Symon on 16 Feb 2010 10:52
On 2/15/2010 10:08 PM, msegura wrote:
> Hi, I'm workng with MGT as GT_CUSTOM.
> I use the MGT for transmiting to pulses of .66ns(1/15Ghg).
> I check all the delays with FPGA editor and all was ok, but I mesure the
> pulses at the SATA conector and there are a delay between SATA0 and SATA1
> of 500ps.

What are these two signals? Where do they connect to your FPGA?

Syms.
From: Ed McGettigan on 16 Feb 2010 12:30
On Feb 15, 2:08 pm, "msegura" <ms_...(a)usc.edu> wrote:
> Hi, I'm workng with MGT as GT_CUSTOM.
> I use the MGT for transmiting to pulses of .66ns(1/15Ghg).
> I check all the delays with FPGA editor and all was ok, but I mesure the
> pulses at the SATA conector and there are a delay between SATA0 and SATA1
> of 500ps.
> I simplified the program as much as posible and this delay is always
> present.
> The mesurment was made with the same cable lenght.
>
> Same ideas?
> Thansk
> Marcelo
>
> ---------------------------------------        
> Posted throughhttp://www.FPGARelated.com

The lane-to-lane skew isn't zero and the maximum value is listed in
the device datasheet. For instance with Virtex-5 the GTP value is
855ps.

Ed McGettigan
--
Xilinx Inc.
From: Marcelo on 19 Feb 2010 14:58
Ed,
So you told me that its no posible to sent two bits using diferent MGT with the same delay?
But how work the comm systems that use several paralle channels?
I'll check the datasheet for my virtex2p.
Marcelo

---
frmsrcurl: http://compgroups.net/comp.arch.fpga/rocketio-TX-delay-between-sata0-and-sata1
From: Muzaffer Kal on 19 Feb 2010 23:06
On Fri, 19 Feb 2010 13:58:25 -0600, Marcelo <user(a)compgroups.net/>
wrote:

>Ed,
>So you told me that its no posible to sent two bits using diferent MGT with the same delay?
>But how work the comm systems that use several paralle channels?

Inter-lane skew is handled in the controller during training. Transmit
skew is not the only cause of skew, channel (cable or pcb) and
receivers also contribute to it too. It's much easier to manage it in
digital domain after data recovery than to try to make perfect
channels.
--
Muzaffer Kal

DSPIA INC.
ASIC/FPGA Design Services

http://www.dspia.com
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