From: shridhar on 23 Jun 2005 01:31
we are reading an ADC o/p through FPGA. To remove the DC Offset present
in the ADC input we have a DAC which can remove this DC offset using a
subtractor before the actual analog input (with added DC offset) goes
Now I want my FPGA to calculate the DC offset from ADC outputs and then
feed this value to DAC input which in turn cancel the DC offset using
can anybody suggest me how can i implement this in FPGA? I just gone
through net and realized that i can use a subtractor and a MAC. The ADC
output will go to this Subtractor which has the final output of MAC as
other input. the subtractor output will be multiplied with some small
value K (??) and then an accumulator. The final output of accumulator
can be feedback to the DAC. The DAC o/p is going to Mixer to cancel the
this is what i understood. can somebody through some light?
suggestions are welcome.
From: ytregubov on 23 Jun 2005 04:02
Use highpass filter.
From: Andor on 23 Jun 2005 04:46
> Now I want my FPGA to calculate the DC offset from ADC outputs and then
> feed this value to DAC input which in turn cancel the DC offset using
> suggestions are welcome.
From: Dave Coffey on 23 Jun 2005 05:04
One trick you could try would be to perform
your accumulation over a power of two number
of samples (e.g. 64, 128, etc).
This would obviate the need for multiplication
since division by powers of two can be accomplished
by bit shifting to the right. Without having to use
a barrel shifter, you could for instance align the
read latch for your subtraction register such that
it's lsb is aligned with the Kth bit of the accumulator.
For example,if you wanted to remove the running average of 64
samples you simply align the latch with bit 7
(assuming bit zero is the LSB) of your accumulator
thus discarding the lower 6 bits.
Be careful, for instance if you are using a bipolar ADC,
that you do not neglect to implement the correct sign
extension logic and two's complement arithmetic.
That said, you can work wonders with a simple CR filter
for DC removal though if the board is already fabricated
and your only 'free parameter' is the FPGA it may not be an option.
From: Steve Underwood on 23 Jun 2005 09:39
> Use highpass filter.
That's a really bad idea. A filter cutting off very low in the band is
not nice. Estimating the DC and subtracting it is the right approach.