From: Eugene Miya on
In article <46454fff$1(a)news.meer.net>, Greg Lindahl <lindahl(a)pbm.com> wrote:
>Sounds like ordinary microcode on a pipelined processor. The FPS
>AP120B array processor (which didn't come along until the early 80s)
I had one at JPL in Fall 1977.
>let you microcode it directly. But since it's just microcode, it's not
>exactly a novel idea, it's just unusual today to think of directly
>programming it that way.

I think there are FPS ads in the Sept. 77 Sci Am which touted it as a 7600
class processor on your PDP-11 (not bad, but I/O then becomes your bottle
neck).

We could use one for the Museum.


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From: Eugene Miya on
>> (Rau and Fisher say "The earliest VLIW processors built were the
>> so-called attached array processors ..." [IBM 2938/3838, AP-120B],
>> "Instruction-level parallel processing: History, overview, and
>> perspective," J. Supercomputing, 1993.)

In article <T1c1i.10046$yM2.3407(a)bgtnsc04-news.ops.worldnet.att.net>,
Stephen Fuld <S.Fuld(a)PleaseRemove.att.net> wrote:
>I'm sure that depends upon the definition of VLIW.

What about the Univac ISP Stephen? While it was after the APs in the 70s,
would you consider it and ILP/VLIW machine?

--
From: Eugene Miya on
>>> VLIW isn't just wide microcode with multiple functional units. It's
>>> also the compiler techniques with trace scheduling and speculative
>>> execution that let it keep large numbers of units busy.

Eric wrote:
>>That doesn't explain how I can look at a piece of hardware and
>>definitively state that it is or is not VLIW. I think it should
>>be possible to do that without looking at the software.

I have memories of seeing my first Trace board....

In article <f28b1i$ujk$1(a)gal.iecc.com>, John L <johnl(a)iecc.com> wrote:
>Well, like I said, try programming it by hand, and if you can't, it
>must be VLIW.

So gee Eric, does that mean we are going to dust off the Multiflow and
grab Josh to reboot it? 8^)

--
From: Eugene Miya on
In article <1179113537.089454.4260(a)n59g2000hsh.googlegroups.com>,
Quadibloc <jsavard(a)ecn.ab.ca> wrote:
>So I may be mistaken in some of my thinking about this topic.
>
>But I would think that there is a very simple definition of VLIW.
>Instructions explicitly code for superscalar operation.

So go back to Fisher's original ELI. Or ILP.

>Note that the Cyberplus from Control Data had multiple functional
>units which could all be busy at once, but did not have a large number
>of fast data memories that could be used as sources and destinations
>in the same instruction, so it functioned as a *dataflow*
>architecture.

Well many firms kept multiple functional units busy. The AFP/Cyberplus
was far from the first dataflow machine. I can think of 3 firms which
used that word such as what which later became Alliant, and I think that
other one which was Dana/Ardent/Stardent,.... You then have to define who
does and does not constitute a functional unit.

>The term VLIW has since been applied to such things as a DSP from
>Texas Instruments that fetches eight instructions at once, with these

ELI was so much simpler.....

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From: Eugene Miya on
In article <f22rat$o79$1(a)hubcap.clemson.edu>,
Mark Smotherman <mark(a)clemson.edu> wrote:
>I wonder if there are other VLIW designs prior to the definition
>of the term in the 1980's. I am aware of:
>- IBM SSEC (1948) - two instructions in a "line of sequence",
>- various horizontal microprogramming approaches (e.g., the
> 1953 paper suggesting horizontal microcode by Wilkes and
> Stringer; some suggest Turing's ACE, ca. 1946)
>- Elliott 152 (1950) and Elliott 153 (1954) - the 154 had a
>- array processors, including
> IBM 2938 Array Processor (1969)
> IBM 3838 Array Processor (1974)
> FPS AP-120B (1975)
>- Culler patent (1973) - "Data processor with parallel operations
>- Pomerene patent (1981) - "Machine for multiple instruction
>- Rau's Polycyclic Architecture project at TRW/ESL (1981)
> and then his work at Cydrome (1983-1988)
>- Fisher's ELI-512 design (1983)
> and then his work at Multiflow (1984-1990)
>Anyone know of other VLIW-like designs pre-1980?
>
>(Rau and Fisher say "The earliest VLIW processors built were the
>so-called attached array processors ..." [IBM 2938/3838, AP-120B],
>"Instruction-level parallel processing: History, overview, and
>perspective," J. Supercomputing, 1993.)

Did you also get their book from the same year?

We got the Cydra 5 and the Trace at the Museum but they are likely never
to be placed on display, because the public can't discriminate between
one box and another at that level. I still have to look for samples of the
various FPS boxes (the hypercube as well as the 164 and 264, and trying to
explain this to the somewhat clueless, Cray-biased, curators is
my next headache on them).

Mark, you would know better, but I've even heard the Stretch (7030) as a
precursor VLIW. I think most claims except Fisher's are somewhat overrated
and in some cases after the fact.

You might also looks of Senzig's VAMP paper (remote chance).


>P.M. Melliar-Smith, "A design for a fast computer
>for scientific calculations," in 1969 AFIPS FJCC, pp. 201-208.
>. (He's writing in reaction to
>execution resources "squandered" and "wasted" by a Tomasulo-like
>E-box coupled with a one-instruction-decode-per-cycle I-box.)

Yeah, I'd go with the quotes.
A lot of that kind of thinking back then.

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