Computer Architecture
in [Hardware]
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Thumb 2 instruction set? Where is the THUMB v2 instruction set architecture manual? ... 10 Jul 2006 00:07
Harvard vs Unified vs Von Neumann Hi: My understanding of these terms is as follows: Harvard: data and instruction storage areas are physically distinct, with distinct buses for loading/storing of data and instruction respectively. Von Neumann: The same physical area in memory is used for data and instruction storage (logical distinction???... 8 Jul 2006 14:17
answers. Any one having answers for the questions present in "COMPUTER ORGANISATION"by CARL HAMACHER and VRANESIC ------------------. If yes plz send the link. That will help me lot ... 27 Jun 2006 13:10
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Advantage and Disadvantage of combining the write buffer and victim cache Hello, Everyone, This is a question in textbook, but I have no idea about how to solve this. A cahche may use a write buffer to reduce write latency and a victim cache to hold recently evicted(nondirty) blocks, Would there be any advantages to combining the two into a single piece of hardware? Would there be ... 23 Jun 2006 02:17
Few queries about L2 Cache Hi, 1. Why do we require two stages of caches(L1 and L2). 2. What are the advantages or disadvantages of having two stages of cache instead of having single, larger L1cache. 3. In one paper(Level 2 Cache for High-performance ARM Core-based SoC Systems) it is mentioned that "The larger the cache is, the slower i... 27 Jun 2006 13:10
"Livermore Loops" on x86 Linux I recently downloaded C code for Livermore Loops from http://www.netlib.org/benchmark/livermorec How can compile it for x86 Linux using gcc? ... 19 Jun 2006 23:36
Memory Mapped I/O Vs I/O Mapped I/O Hi, Could anyone explain the differences between memory mapped I/O and I/O mapped I/O. Iam kind of dense so the more information the better. Thanks, Jan ... 21 Jul 2006 05:16
skewed alu Hi all I have heard the term "skewed alu" mentioned in some documents. My limited understanding of this is that it allows reduction of load dependency for a following dependant instruction. Is this correct ? Also how, is this feature actually implemented? I did a search in google for "skewed alu" but di... 5 Jun 2006 11:35
Funnel shift In the course of some tech writing I'm involved in, I've come across the term "funnel shift". I get that this has to do with concatenating the contents of two registers, or at least part of the contents of two registers, into one register. However, it would really help to see a detailed, step-by-step illustrated ... 17 May 2006 23:51 |