Computer Architecture
in [Hardware]
|
x86, how does a process switch from user mode to kernel mode I have a naive question about how the context switch between user mode and kernel mode happens in a live processor. Allow me to illustrate my question with an example: if (x == 0) } printf("x is 0"); } If you look at the above snippet of C-code, the printf function call eventually causes the process to... 6 Oct 2006 00:51
How Many Processor Cores Are Enough? Today I read that we're going to get quad-core processors in 2007, and 80-core processors in 5 years. This has got me to wondering where the point of diminishing returns is for processor cores. We've all seen those bench marks in which the same test is run on a system with 128MB of RAM, then 256MB, then 512MB, .... 15 Dec 2006 05:28
MIPS architecture question - Supervisor mode & who is using it? DEFINITIVE ANSWER [Note: I'm suffering the same problem as others that followup postings try to start new threads and don't include the original post.] 1) All MIPS chips have had kernel mode and user mode. 2) The 3rd mode, Supervisor, got added for other reasons than VMS, although that may have come in later [I don't remember]. ... 27 Sep 2006 16:47
x86 protection rings ammonton(a)cc.full.stop.helsinki.fi wrote: In a related question, has any x86 OS used all the protection levels, or are only ring 0 and ring 3 used? Virtual machine monitors (e.g. VMWare and Xen) sometimes use ring 1 to run the kernel code of a guest OS. That's the only software I'm aware of that uses ring 1 o... 30 Sep 2006 11:22
File systems [ ... ] So what are the features that good file system should have, besides never silently dropping updates, and never allowing an inconsistent state? Those are terrible properties for a filesystem to force on people. But they are admittedly useful for newbies who don't fully understand the tradeo... 26 Sep 2006 18:35
Call for Sessions Proposals: The World Congress on Engineering and Computer Science WCECS 2007 Call for Special Sessions Proposals From: IAENG: International Association of Engineers (http://www.iaeng.org) Engineering Letters (http://www.engineeringletters.com) IAENG International Journal of Computer Science (http://www.iaeng.org/IJCS/) World Congress on Engineering and Computer Science WCECS 2007 San Fr... 20 Sep 2006 09:51
Trying to design low level hard disk manipulation program I posted this on comp.lang.asm.x86, alt.os.development, comp.arch, comp.lang.c++ Im working with windows xp professional, NTFS and programming with MASM, c++ (free compiler) or visual basic 6.0 === question 1 Primarily Im trying to design a program that has full control over a hard disk. What it needs to do... 16 Oct 2006 21:16
virtual memory I was unable to send this back when we were discussing this in the summer because my ISP dropped newsgroup support and it took a while to find a free server that allows posting. Belated as it is, since I put in the effort I figured I might as well send it anyway. Anne & Lynn Wheeler wrote: grenoble modifie... 12 Sep 2006 15:33
what is the minimal Instruction set of a microprocessor ? Hi All, if I want to design a minimal microprocessor what can be the minimal set of instructions I have to provide...? Please suggest. ... 20 Sep 2006 13:06
intel: fb-dimm channels <please comment if I'm wrong here> intel memory controllers seem to brag about "4 channels" of FB-DIMM. Yeah, they have 4 FB-DIMM interfaces, but it's not 4 channels. When you dig into the data sheet, it appears they always use 2 serial interfaces per access, since they've created an adjacent symbol error corr... 7 Sep 2006 20:08 |