From: fpga_toys on

Antti Lukats wrote:
> 3) think twice before claiming to know the contents of the heads of the
> others

Both YOU and Austin are crazy to assert the ASSP's are blocking access
to SATA-IO membership. By joining Austin's conspiracy theory, you
violate this very rule of yours.

Frankly, when I read down the SATA-IO membership list, I see a large
number of companies that should actually prefer the FPGA vendors were
part of the standards process and shipping SATA enabled FPGA's. Even
some of the ASSPs, since that would provide a prototype path to their
volume production.

From: John_H on
rickman wrote:
> PeteS wrote:
>> I'll second this with an added comment: Spread spectrum clocks are an
>> absolute must in some areas, and very desirable in others; I would
>> *love* to use a spread spectrum clock in my newest design because it
>> does not have a metal enclosure and EMI/EMC is a major issue.
>
> I understand that spread spectrum helps pass EMI testing. But does a
> spread spectrum clock actually help reduce interference? It seems to
> me that by relatively changing the clock frequency, all you are doing
> is fooling the test equipment which operates slowly in comparison. In
> reality you have not reduced the energy transmitted and unless your
> interference is very narrow band in nature, it will not fix the
> problem.

You are correct that the energy transmitted is the same. The test
equipment isn't fooled: it still reads the same energy. The trick is
that the energy is spread over a larger bandwidth. The higher the
harmonic, the wider the bandwidth and the lower the maximum power since
the energy is constant in that harmonic. While 30 kHz might not seem
like a "wide" bandwidth for interference purposes, when is interference
noticed above noise? Typically when it's rather narrow-band. 30 kHz
isn't broad, but it isn't narrow-band. The interference should appear
as a degraded noise floor but with no narrow band troubles.

> Many applications that care about EMI are not helped by a "trick" that
> gets through the testing without actually solving the problem. For
> example self interference in a radio. I don't think a spread spectrum
> clock on the digital circuits would actually reduce the amount of
> interference seen.
>
> Am I wrong about this?

The application will tell you if the increased noise floor is a problem.
For the case of self interference in a radio, a degraded noise floor
will degrade the performance when highest sensitivity is needed but the
annoying tones won't be there.
From: rickman on
Martin E. wrote:
> We are designing with a V2P30 right now for migration to an equivalent V5
> Q1'07. The SATA solution won't be needed until early next year. Would V5
> work then?
>
> Also, is SATA IP commercially available?
>
> I guess an alternative might be to go PCI X/e and then use an off-the shelf
> SATA controller that talks to PCI. The problem is that I need lots of
> drives in parallel (I do mean LOTS) for this application. It'd be easier to
> hang them right off an FPGA with a PHY (which seem to be impossible to get).

Ignoring all the paranoid nonsense that is being posted about this, I
was able to Google search and find at least one potential PHY from
Atmel, the AT78C5091. They have a summary data sheet although I don't
see a full sheet. They provide a contact which I assume means they
will only sell it if you are interested in high volumes.

It may well be that external PHY chips are not used because of the high
power or the high data rate. It would be a lot cheaper and lower power
to integrate the PHY into your controller chip.

From: fpga_toys on

John_H wrote:
> You are correct that the energy transmitted is the same. The test
> equipment isn't fooled: it still reads the same energy. The trick is
> that the energy is spread over a larger bandwidth.

ummm ... yes and no. The test equipment has a specific bandwidth
(either from front end filters, or from FFT resolution) and a specific
integration time, both of which can be, and are likely to be, affected
by the spread spectrum effects.

The mV/m^2 remains the same, it's just time shifted across the 30KHz
bandwidth, with the assumption that is less evil. Which is the case for
signals that are integrated at 15KHz and below. At the reciever, the
MV/m^2 power from all sources is summed. Without spread spectrum, two
interference sources would have to have the same frequency to sum. With
spread spectrum they sum if within 30KHz of each other (or whatever the
spreading bandwidth is).

However, for data rate signals with symbol times greater than 30KHz,
the symbol decoder is integrating at a much faster rate, and the 30KHz
shift is a full power interference for one or more symbol times.

For recievers which are wide band, such as most data modems, the 30KHz
shift keeps the same mV/m^2 energy completely inside the channel that
is a MHz wide or two. The spread spectrum doesn't reduce the
interference at all, and may actually make it worse by additively being
integrated with non-spread spectrum narrow channel power sources,
taking the peak power at a specific frequency above what the reciever
can reject.

or, Did I miss something?

From: Antti Lukats on
"rickman" <gnuarm(a)gmail.com> schrieb im Newsbeitrag
news:1156619847.879877.247170(a)b28g2000cwb.googlegroups.com...
> Martin E. wrote:
>> We are designing with a V2P30 right now for migration to an equivalent V5
>> Q1'07. The SATA solution won't be needed until early next year. Would
>> V5
>> work then?
>>
>> Also, is SATA IP commercially available?
>>
>> I guess an alternative might be to go PCI X/e and then use an off-the
>> shelf
>> SATA controller that talks to PCI. The problem is that I need lots of
>> drives in parallel (I do mean LOTS) for this application. It'd be easier
>> to
>> hang them right off an FPGA with a PHY (which seem to be impossible to
>> get).
>
> Ignoring all the paranoid nonsense that is being posted about this, I
> was able to Google search and find at least one potential PHY from
> Atmel, the AT78C5091. They have a summary data sheet although I don't
> see a full sheet. They provide a contact which I assume means they
> will only sell it if you are interested in high volumes.
>
> It may well be that external PHY chips are not used because of the high
> power or the high data rate. It would be a lot cheaper and lower power
> to integrate the PHY into your controller chip.
>
oh there are "product briefs" for SATA PHY's available from many different
vendors.
but have you ever tried to purchase a SATA PHY IC? try! and let us know if
you succeed!

Antti