From: rickman on
Antti Lukats wrote:
> "rickman" <gnuarm(a)gmail.com> schrieb im Newsbeitrag
> news:1156619847.879877.247170(a)b28g2000cwb.googlegroups.com...
> > Martin E. wrote:
> >> We are designing with a V2P30 right now for migration to an equivalent V5
> >> Q1'07. The SATA solution won't be needed until early next year. Would
> >> V5
> >> work then?
> >>
> >> Also, is SATA IP commercially available?
> >>
> >> I guess an alternative might be to go PCI X/e and then use an off-the
> >> shelf
> >> SATA controller that talks to PCI. The problem is that I need lots of
> >> drives in parallel (I do mean LOTS) for this application. It'd be easier
> >> to
> >> hang them right off an FPGA with a PHY (which seem to be impossible to
> >> get).
> >
> > Ignoring all the paranoid nonsense that is being posted about this, I
> > was able to Google search and find at least one potential PHY from
> > Atmel, the AT78C5091. They have a summary data sheet although I don't
> > see a full sheet. They provide a contact which I assume means they
> > will only sell it if you are interested in high volumes.
> >
> > It may well be that external PHY chips are not used because of the high
> > power or the high data rate. It would be a lot cheaper and lower power
> > to integrate the PHY into your controller chip.
> >
> oh there are "product briefs" for SATA PHY's available from many different
> vendors.
> but have you ever tried to purchase a SATA PHY IC? try! and let us know if
> you succeed!

Atmel has three devices on their HDD page and I am confident that they
offer them for sale. I expect that if I wanted to buy a million they
would be readily available. The OP did not say how many he expects to
use so I am just providing a potential source. What they cost will
depend on how many he wants.

From: fpga_toys on

rickman wrote:
> Atmel has three devices on their HDD page and I am confident that they
> offer them for sale. I expect that if I wanted to buy a million they
> would be readily available. The OP did not say how many he expects to
> use so I am just providing a potential source. What they cost will
> depend on how many he wants.

Guess I'll have to go look into that as well. I was going to bid an
SATA controller design based on the mistaken assumption that since the
XUP Virtex-II Pro board had SATA interfaces, that it would be
relatively easy to include in the design. Even picked up one of these
expensive XUP development systems to prototype it with. Let's just say
that this insight was timely, and after the whining by Austin/Antti
about the SATA-IO NDA's it's about time to cut my losses with Xilinx
and pickup some Altera software and development boards. I'm getting
real tired of wasting money on Xilinx products which do not work.

Maybe Altera will listen to this, join SATA-IO and license the IP for
it's next product turn.

From: fpga_toys on

Antti wrote:
> ML300 and digilent XUP V2Pro both have SATA connectors on
> them but can not actually be used for SATA as of compliance issues.
> (OOB and CDR lock range mainly)

As a new owner of XUP V2Pro board, my comment is that Xilinx screwed up
royally by not joining the standards process BEFORE shipping a SATA
based product or design. I purchased the board simply BECAUSE it had
these interfaces.

There are certain expectations that systems vendors actively take part
in industry standards if they are going to ship and support products
based on those standards. I've spent years of my life supporting
standards processes ... they are the most valuable customer asset a
systems company can invest in to protect both their products, their
customers products, and a safe product migration path over time.

From: fpga_toys on

rickman wrote:
> But
> the issue of open documentation on SATA, is that about the cost to
> Xilinx or the cost to their customers?

We all license IP .... certainly Xilinx customers should be used to
that by now given core costs and marketing.

> I can see where they would not
> want to work with a standard that makes it difficult for their
> customers to get documentation.

And those that purchase Xilinx cores are free to republish the works on
the net?

> Did Xilinx really
> complain that the SATA IP is not free?

Well ... take a look at Austin's rant ... and the rant that triggered
this flame fest.

From: Antti Lukats on
"Peter Wallace" <pcw(a)karpy.com> schrieb im Newsbeitrag
news:pan.2006.08.26.16.39.34.985268.62399(a)karpy.com...
> On Fri, 25 Aug 2006 12:41:38 -0700, Martin E. wrote:
>
>> I am looking for a way to read/write to a SATA drive from an FPGA. I've
>> looked around. Nothing seems to fit the bill. Any ideas worth
>> considering?
>>
>> Thanks,
>>
>> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Martin
>>
>> To send private email:
>> email = x(a)y.com
>> where:
>> x = "martineu"
>> y = "pacbell.net"
>
> Not ideal pin count wise but how about a SATA-PATA bridge?
>
> We're using the JMicron chip, its inexpensive and goes both ways (host &
> device)
>
> Peter Wallace

thats almost the only possible solution and also the most cost effective
as the SATA PHY+FPGA resource cost is higher then SATA-PATA IC cost

Antti