From: ranjit_mathews@yahoo.com on

Tim Bradshaw wrote:
> On 2006-10-10 18:26:54 +0100, "ranjit_mathews(a)yahoo.com"
> <ranjit_mathews(a)yahoo.com> said:
>
> > Can you think of any component that has reached its maximum performance
> > or lowest latency and will never again get faster or snappier? If not,
> > then you can. All you do is to hold off on speed or latency
> > improvements to some components till you've got ready to speed up all
> > of them (or a certain subset of them) in synch.
>
> Why yes, I can. c has been constant for billions of years, and there's
> no evidence at all that it will increase any time soon.

Si Si! So, there are limitations on what you can do with a GHz signal
on a trace longer than a foot. Which components have stagnated as a
consequence of this?

From: Tim Bradshaw on
On 2006-10-10 19:27:39 +0100, nmm1(a)cus.cam.ac.uk (Nick Maclaren) said:

> Actually, we have no proof of that :-)

No, some fairly good evidence though :-)

From: Tim Bradshaw on
On 2006-10-10 20:05:48 +0100, "ranjit_mathews(a)yahoo.com"
<ranjit_mathews(a)yahoo.com> said:

> Si Si! So, there are limitations on what you can do with a GHz signal
> on a trace longer than a foot. Which components have stagnated as a
> consequence of this?

At a 3GHz a signal can travel about 4in (.1m) in one cycle at c. My
electrical engineering skills are no longer up to working out what the
actual speed of transmission down traces is, but I'm willing to bet
money it's not higher than c, and I suspect it's a bunch lower. So,
let's think: might main memory latency be an issue as clock speed goes
up? Why, yes, I do believe it might.

--tim

From: Bill Todd on
ranjit_mathews(a)yahoo.com wrote:
> Bill Todd wrote:
>> ranjit_mathews(a)yahoo.com wrote:
>>> Bill Todd wrote:
>>>> ranjit_mathews(a)yahoo.com wrote:
>>>>> Bill Todd wrote:
>>>>>> ranjit_mathews(a)yahoo.com wrote:
>>>>>>> Greg Lindahl wrote:
>>>>>>>> In article <1160421201.367674.89490(a)c28g2000cwb.googlegroups.com>,
>>>>>>>> ranjit_mathews(a)yahoo.com <ranjit_mathews(a)yahoo.com> wrote:
>>>>>>>>
>>>>>>>>>> Spec/GHz is very nearly totally meaningless.
>>>>>>>>> Then why does the Core 2 Duo find favor over Pressler core processors?
>>>>>>>> Because Core2 is faster at lower power? Note that "GHz" doesn't appear
>>>>>>>> in the sentence; Ghz is just an implementation detail, not comparable
>>>>>>>> between designs.
>>>>>>> No, since for a given design, if you know ops/GHz, you can estimate
>>>>>>> what the ops would be at (say) 50% more GHz.
>>>>>> And what, exactly, do you believe you have gained once you've done that?
>>>>> If you can estimate how much faster they can clock it relative to how
>>>>> much faster other processors can be clocked, you can estimate how much
>>>>> faster it will get relative to other processors.
>>>> That, as the saying goes, is a mighty big 'if'.
>>>>
>>>> On what basis would you estimate how much faster those processors can
>>>> clock, anyway?
>>> I don't know the field.
>> I think that was beginning to become obvious. Don't you think it's a
>> bit presumptuous to contradict someone under those circumstances?
>
> It's also obvious that competing processor designers do it somehow; it
> seems most unlikely that they wouldn't try to estimate the headroom
> left in a competing processor.

That's hardly the point: the point is that you haven't a clue *how*
they might go about doing this, yet confidently contradicted a (readily
supportable) statement by someone who does happen to have a clue, purely
on the basis of some incompetent extrapolation on your part.

And here you are still attempting to bluster your way out of it. Tsk,
tsk. When you don't know what you're talking about, either shut up or
ask a question.

- bill
From: Del Cecchi on

"Tim Bradshaw" <tfb(a)tfeb.org> wrote in message
news:egh1e8$3up$1$8300dec7(a)news.demon.co.uk...
> On 2006-10-10 20:05:48 +0100, "ranjit_mathews(a)yahoo.com"
> <ranjit_mathews(a)yahoo.com> said:
>
>> Si Si! So, there are limitations on what you can do with a GHz signal
>> on a trace longer than a foot. Which components have stagnated as a
>> consequence of this?
>
> At a 3GHz a signal can travel about 4in (.1m) in one cycle at c. My
> electrical engineering skills are no longer up to working out what the
> actual speed of transmission down traces is, but I'm willing to bet
> money it's not higher than c, and I suspect it's a bunch lower. So,
> let's think: might main memory latency be an issue as clock speed goes
> up? Why, yes, I do believe it might.
>
> --tim

It is indeed sad to see architects contemplate physical reality. :-)
Sending multiple GHz signals multiple feet is pretty common these days.
Signals propagate on printed wire on epoxy fiberglass (FR4) boards at
about 70 ps/cm (170ps per inch for nick)(just kidding nick, I know you
use the metric system every chance you get). Note, C is about 30ps/cm.

So having a foot of wire adds about 2ns of latency. So far as I know, no
components have stagnated because of this.

Masked and Anonymous
>