Ultra low frequency VCO
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From: Tim Wescott on 7 Jul 2010 11:42 On 07/07/2010 04:52 AM, JosephKK wrote: > On Tue, 6 Jul 2010 09:10:25 -0700 (PDT), Daku<dakupoto(a)gmail.com> wrote: > >> On Jul 5, 8:59 pm, Tim Wescott<t...(a)seemywebsite.com> wrote: >>> I'd hardly call 60Hz "ultra low frequency". But it is pretty darned low. >>> >>> All the suggestions you've gotten so far are good as far as they go and >>> may well be perfect -- but what are you trying to do? Do you need sine >>> wave out or square? If sine wave, how pure? Do you have any >>> specifications on jitter, phase noise, or frequency accuracy? >> I am trying to design a PLL for very low frequencies, e.g., power line >> grid. >> I am concerned with the VCO as it is a crucial sub-circuit. I am >> aiming for >> a phase noise of approximately -100 dBc/Hz but not very sure of the >> offset > > Yikes, it would take years (decades) to measure that. Your reference > standard to measure against would be problematic as well. One cycle > (about 16.667 ms) * 10^10 is over 46,000 hours, 275 weeks, 5.2 years. Not if you multiplied the VCO output by a quadrature sine wave and looked at the noise of the result. Then it would just take minutes. > How about reframing it as a jitter and wander specification? > >> frequency. Ideally, I would like to have frequency accuracy of 1 - 5% >> at most. > > You would blow the phase noise spec by being off by fractional > millihertz. I think the OP's idea is that the absolute frequency vs. command voltage can have an offset, because the PLL will be correcting for it. It's the random contribution to phase noise that he's trying to limit. It's an awfully tight spec -- and one that could easily get blown with one noisy stage in the chain, outside of the oscillator -- but I don't think it's impossible to do on a bench top. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html
From: j on 7 Jul 2010 11:43 Phase noise and frequency accuracy are two different parameters. For example its possible to have a phase noise spec of great than 100 dbs at x number of hz of the carrier and have over 10KHz or more of frequency in accuracy. Jitter is the parameter that has a direct correlation to phase noise. Is the goal of the project to lock to 60 Hz line,(it's the ref for the loop), and provide a clean 60 Hz out? j
From: JosephKK on 7 Jul 2010 23:04 On Wed, 07 Jul 2010 08:42:15 -0700, Tim Wescott <tim(a)seemywebsite.com> wrote: >On 07/07/2010 04:52 AM, JosephKK wrote: >> On Tue, 6 Jul 2010 09:10:25 -0700 (PDT), Daku<dakupoto(a)gmail.com> wrote: >> >>> On Jul 5, 8:59 pm, Tim Wescott<t...(a)seemywebsite.com> wrote: >>>> I'd hardly call 60Hz "ultra low frequency". But it is pretty darned low. >>>> >>>> All the suggestions you've gotten so far are good as far as they go and >>>> may well be perfect -- but what are you trying to do? Do you need sine >>>> wave out or square? If sine wave, how pure? Do you have any >>>> specifications on jitter, phase noise, or frequency accuracy? >>> I am trying to design a PLL for very low frequencies, e.g., power line >>> grid. >>> I am concerned with the VCO as it is a crucial sub-circuit. I am >>> aiming for >>> a phase noise of approximately -100 dBc/Hz but not very sure of the >>> offset >> >> Yikes, it would take years (decades) to measure that. Your reference >> standard to measure against would be problematic as well. One cycle >> (about 16.667 ms) * 10^10 is over 46,000 hours, 275 weeks, 5.2 years. > >Not if you multiplied the VCO output by a quadrature sine wave and >looked at the noise of the result. Then it would just take minutes. What is done at RF of 60 MHz, 600 MHz, or 6 GHz to make the measurement easier, does not make it faster. Sure, it takes a second or so at 600 MHz for 100 dBc. And a megasecond or so at 60 Hz to measure it in the RF traditional way. Simple scaling. That is why i recommended changing to jitter and wander specifications, which you have a decent shot at measuring in an hour or so. Or maybe you are on to something, but for my and OPs sake, please flesh it out a lot more, with some calcs please. > >> How about reframing it as a jitter and wander specification? >> >>> frequency. Ideally, I would like to have frequency accuracy of 1 - 5% >>> at most. >> >> You would blow the phase noise spec by being off by fractional >> millihertz. > >I think the OP's idea is that the absolute frequency vs. command voltage >can have an offset, because the PLL will be correcting for it. It's the >random contribution to phase noise that he's trying to limit. > >It's an awfully tight spec -- and one that could easily get blown with >one noisy stage in the chain, outside of the oscillator -- but I don't >think it's impossible to do on a bench top.
From: Phil Hobbs on 8 Jul 2010 15:29 Paul Keinanen wrote: > On Tue, 06 Jul 2010 09:52:43 -0700, Tim Wescott <tim(a)seemywebsite.com> > wrote: > >> On 07/06/2010 09:10 AM, Daku wrote: >>> On Jul 5, 8:59 pm, Tim Wescott<t...(a)seemywebsite.com> wrote: >>>> I'd hardly call 60Hz "ultra low frequency". But it is pretty darned low. >>>> >>>> All the suggestions you've gotten so far are good as far as they go and >>>> may well be perfect -- but what are you trying to do? Do you need sine >>>> wave out or square? If sine wave, how pure? Do you have any >>>> specifications on jitter, phase noise, or frequency accuracy? >>> I am trying to design a PLL for very low frequencies, e.g., power line >>> grid. >>> I am concerned with the VCO as it is a crucial sub-circuit. I am >>> aiming for >>> a phase noise of approximately -100 dBc/Hz but not very sure of the >>> offset >>> frequency. Ideally, I would like to have frequency accuracy of 1 - 5% >>> at most. >>> Also, I am aware that S-parameter methods are not appropriate at these >>> low >>> frequencies. > > If you want to track the _actual_ mains frequency, just use a mains > driven synchronous motor. To get the noise sidebands down, use some > flywheels :-). > >> I think that those specs would be difficult to achieve with an >> all-analog oscillator running at 60Hz. Not impossible -- I could do it, >> and Joerg could do it in a fraction of the time I'd take. Using some >> sort of direct digital synthesis -- even if it's just a microprocessor >> -- running off of a crystal reference would be almost trivial in >> comparison and would probably take less board space and would be far >> more repeatable in manufacturing. >> >> If you just had to do this purely in the analog domain your best bet >> might be a pair of crystal oscillators, frequency steered with >> varactors, carefully built, and with their outputs mixed down to 60Hz. >> But that's a solution I would expect to see in a bit of kit from the >> 50's through the 80's -- anything later and I'd expect to see a DDS. > > Just a few minutes ago, the Nordel AC network (Danish isles, Finland, > Norway, Sweden) was running at 50.11 Hz or +2200 ppm above nominal in > order to allow the mains synchronized clocks to catch up. > > A simple fundamental frequency VXCO can be pulled about +/-100 ppm > with the load capacitance. About 1000 ppm is the maximum with > adjustable serial inductance and adjustable parallel load capacitance > at the crystal. > > At 50/60 Hz, even a trivial processor can generate a variable > frequency sine wave using the NCO (Numerically Controlled Oscillator) > principle to generate a sine wave, which can be locked to the incoming > signal in some loop configuration. > > Even a trivial processor might be able to generate both sine and > cosine waveforms for 49.98, 50.00. 50.92 Hz etc. in parallel and > performing a phase comparison between all these in parallel to > determine the best match. > I don't know that -100 dBc/Hz is that hard at 60 Hz. I bet you could do that by running a bog standard multivibrator at 1024*1024*60 Hz and dividing down. You'd need a sine shaper, but the phase noise goes down by N**2, so you'd get 100 dB improvement just from that. Alternatively, you could make an LC VCO and divide that down. You might even be able to do it with all analog--the OPA378 has 20 nV/sqrt(Hz) all the way down to DC. With a 5V sine wave at 60 Hz, that's something like 1800 V/s, so 20 nV gives you something like 10 picoseconds per root hertz. You probably lose a factor of sqrt(2) in there, but that ought to be good enough. Your ALC network would contribute more than that, almost for sure. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal ElectroOptical Innovations 55 Orchard Rd Briarcliff Manor NY 10510 845-480-2058 hobbs at electrooptical dot net http://electrooptical.net
From: Phil Hobbs on 8 Jul 2010 15:37
Phil Hobbs wrote: > I don't know that -100 dBc/Hz is that hard at 60 Hz. I bet you could do > that by running a bog standard multivibrator at 1024*1024*60 Hz and > dividing down. You'd need a sine shaper, but the phase noise goes down > by N**2, so you'd get 100 dB improvement just from that. Alternatively, > you could make an LC VCO and divide that down. 120 dB. Can't count today. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal ElectroOptical Innovations 55 Orchard Rd Briarcliff Manor NY 10510 845-480-2058 hobbs at electrooptical dot net http://electrooptical.net |