From: -jg on
On Sep 29, 11:27 am, "Antti.Luk...(a)googlemail.com"
<antti.luk...(a)googlemail.com> wrote:
> On Sep 29, 1:57 am, -jg <jim.granvi...(a)gmail.com> wrote:
>
>
>
> > On Sep 29, 10:35 am, nobody <cydrollin...(a)gmail.com> wrote:
>
> > > JG
>
> > > You asked the question of cheap communication for both programmming
> > > and runtime information at an acceptable bandwidth not to mention the
> > > power over usb. FTDI has been successful in this design and will be
> > > looking at the FT2232 for all its communication protocols, jtag being
> > > one of the most useful in this design.
>
> > Just to clarify, I was talking of their new FT2232H, which has
> > high speed USB.
> > There was a thread some weeks ago on cae, about the sustainable
> > data rate (no breaks/fixed tick-rate) on a 2232H, and I'm not sure
> > what the final answer was. 2232H has larger buffers, and higher peak
> > speeds, so the sustainable number has to be higher ?
>
> > -jg
>
> FTDI has claimed so 20MByte

Has anyone confirmed this is a sustainable ('gapless') rate ?

> this is more then 2 times less than with cypress FX2

The price is also quite a bit lower for FT2232H, and it is sure to
replace a FT232R rather easier.
The speed jump from FT232R to FT2232H, is larger than the smaller
extra gain of the FX2.

20MByte (if supported thru windows) is a good logic analyser, or
Counter sampling rate.

FX2 prices seem to be climbing, and something like a UC3A3 has
a LOT more bang for less $$ (but admittedly is newer, so has less
infrastructure right now.. )

UC3A3 really needs a lower pin count member, for this sort of
FPGA+USB_Instruments application.
-jg

From: Chris on
> Looking for interest in an Open Source Hardware USB programmable FPGA,
> XC3S250E. I have been having some difficulty getting the right people
> exposed to this project. If you have any interest in this project
> would like to hear from you. It is headed into an Open Source Hardware
> agreement therefore their is no proprietary information about the
> design.

Resources available here http://www.fpgaz.com/usbp/index.html and here
http://www.myhdl.org/doku.php/users:cfelton:projects:usbp
From: rickman on
On Sep 28, 8:05 pm, emeb <ebromba...(a)gmail.com> wrote:
> On Sep 28, 10:00 am, Andy Peters <goo...(a)latke.net> wrote:
>
> > Another thing is that S3E appears to be available in more packages
> > than S3A so you might be able to find a better fit for a particular
> > design.
>
> That's my principle objection to the S3A family. I buy my parts from
> Digi-Key, and the only non-BGA packages for S3A are the 50K devices. I
> have fairly limited assembly resources so BGA / QFN parts aren't
> possible, but I want larger devices. What to do?

This is one of my complaints about FPGA vendors. Of course, they are
responding to the market and the profit figure. But my designs
typically use small, cramped boards and BGAs are typically not an
improvement over the right size leaded package. Yes, the BGA looks
smaller on the data sheet, but they typically require a board with
more layers and they use real estate on *both* sides of the board
unless you want to use some pretty exotic technology such as blind
vias. I did a calculation yesterday and found that one of the two low
pin count leadless packages for the S6 parts uses less real estate
than a 100 TQFP by going to a 0.5 mm ball pitch. The other one is
"smaller" but after counting the other side of the board as being
used, actually is 30% larger with a 0.8 mm ball pitch.

And that doesn't consider that these parts are all moe expensive
because of the higher I/O count making higher testing costs.

I'm just not a fan of BGA and CS technology for my designs.

Rick
From: Chris on
On Sep 29, 9:41 am, rickman <gnu...(a)gmail.com> wrote:
> On Sep 28, 8:05 pm, emeb <ebromba...(a)gmail.com> wrote:
>
> > On Sep 28, 10:00 am, Andy Peters <goo...(a)latke.net> wrote:
>
> > > Another thing is that S3E appears to be available in more packages
> > > than S3A so you might be able to find a better fit for a particular
> > > design.
>
> > That's my principle objection to the S3A family. I buy my parts from
> > Digi-Key, and the only non-BGA packages for S3A are the 50K devices. I
> > have fairly limited assembly resources so BGA / QFN parts aren't
> > possible, but I want larger devices. What to do?
>
> This is one of my complaints about FPGA vendors.  Of course, they are
> responding to the market and the profit figure.  But my designs
> typically use small, cramped boards and BGAs are typically not an
> improvement over the right size leaded package.  Yes, the BGA looks
> smaller on the data sheet, but they typically require a board with
> more layers and they use real estate on *both* sides of the board
> unless you want to use some pretty exotic technology such as blind
> vias.  I did a calculation yesterday and found that one of the two low
> pin count leadless packages for the S6 parts uses less real estate
> than a 100 TQFP by going to a 0.5 mm ball pitch.  The other one is
> "smaller" but after counting the other side of the board as being
> used, actually is 30% larger with a 0.8 mm ball pitch.

I agree, I am usually looking for small footprint high logic resource
parts. It is odd, the vendors might have missed some opportunities
here. I come across more and more designers with these needs. Most
designers simply opt out and force a small footprint uC to work (or
barely work). At one point I was excited about the Actel QFNs but
they have these non-standard dual row/column QFNs. And when I do use
a high pin-count BGA majority of the pins are unused.

From: emeb on
On Sep 29, 7:41 am, rickman <gnu...(a)gmail.com> wrote:
> On Sep 28, 8:05 pm, emeb <ebromba...(a)gmail.com> wrote:
>
> > On Sep 28, 10:00 am, Andy Peters <goo...(a)latke.net> wrote:
>
> > > Another thing is that S3E appears to be available in more packages
> > > than S3A so you might be able to find a better fit for a particular
> > > design.
>
> > That's my principle objection to the S3A family. I buy my parts from
> > Digi-Key, and the only non-BGA packages for S3A are the 50K devices. I
> > have fairly limited assembly resources so BGA / QFN parts aren't
> > possible, but I want larger devices. What to do?
>
> This is one of my complaints about FPGA vendors.  Of course, they are
> responding to the market and the profit figure.  But my designs
> typically use small, cramped boards and BGAs are typically not an
> improvement over the right size leaded package.  Yes, the BGA looks
> smaller on the data sheet, but they typically require a board with
> more layers and they use real estate on *both* sides of the board
> unless you want to use some pretty exotic technology such as blind
> vias.  I did a calculation yesterday and found that one of the two low
> pin count leadless packages for the S6 parts uses less real estate
> than a 100 TQFP by going to a 0.5 mm ball pitch.  The other one is
> "smaller" but after counting the other side of the board as being
> used, actually is 30% larger with a 0.8 mm ball pitch.
>
> And that doesn't consider that these parts are all moe expensive
> because of the higher I/O count making higher testing costs.
>
> I'm just not a fan of BGA and CS technology for my designs.
>
> Rick

I'm with you on this. I'm doing hobby stuff, so I want small-ish
boards and inexpensive, readily available parts. I ended up using an
S3E250 in a VQ100 package. I use slave serial mode and load it up from
an ARM processor, with the bitfile stored in a micro SD card. Here's
more on the design:

http://members.cox.net/ebrombaugh1/synth/armfpga/index.html

It's a fun little board and it came up without any major hitches. Just
two layers too.

Eric