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Which is the most beautiful and memorable hardware structurein a CPU?
Sandro wrote: A little bit OT... Yes, this thread would better suit the comp.arch group. There are great CPU architecture specialists there :-) Regards Sandro yg -- / ... 3 Apr 2010 13:42
Great Public and Private undergraduate/graduate schools for Comp Arch and VLSI/Microelectronics
What are some undergrad and grad schools out there that are under- recognized but still have great computer architecture, design automation, or Digital Integrated-Circuit Design programs? I'd like thread contributers to post names of universities/college programs, the country or state, private or public, and mayb... 29 Mar 2010 04:44
Stop The Heat From Sun Rays
Stop the Heat! Stop UV Damage! Save Money! - More Details : ... 29 Mar 2010 03:39
desgin suspended
I bought evaluation board form one american company. This boad was 2 month delayed. After I received it ,the contents is missing. Oh my good!. I'm extermly disappointed. ... 30 Mar 2010 20:39
Which is the most beautiful and memorable hardware structure in a CPU?
Hi, From the first moment I learn how stack segment and stack pointer are used to link all subroutines in PC, I have been appreciating the hardware structure as I can and I think it is the the most beautiful and memorable hardware structure I have learn from the CPU structure. I want to know who invented the str... 3 Apr 2010 14:49
Maximum output rate
I'm thinking of implementing a delta-sigma D/A for the SOQPSK modulator that already has a high (baseband) sample rate - around 40-80 MHz. What kind of (single-bit) output rate can you get with a CPLD or FPGA device? -- Randy Yates % "Remember the good old 1980's, when Digital Signal Labs... 29 Mar 2010 14:42
Multipliers in CoolRunner Series?
Hi, I'm looking for a device that will perform something on the order of hundreds of millions of 12x12 multiplies per second, and I need it small. I only need about 30-40 pins of I/O. Is the Xilinx CoolRunner series completely out of the picture? Any suggestions would be appreciated. -- Randy Yates ... 27 Mar 2010 17:38
Version of Xilinx ISE for Spartan 6 FPGAs
Hi, I am using the XC6SLX9 FPGA in my new design. I would like to know what version of XILINX ISE is required for Spartan-6 series? Can Webpack work with Spartan 6? Thank you, Aditi. ... 29 Mar 2010 00:25
Any advice on which is the best book on CMOS digital circuit ?design?
In comp.arch.fpga Thomas Entner <thomas.entner(a)> wrote: (snip) I do not know the book, but it is hard for me to not disagree with the statement, that a digital logic designer is not responsible for the speed of the circuit. Especially when you are talking about domino logic, etc. i... 27 Mar 2010 23:15
PCB routing issues for sync SRAM
This isn't strictly a FPGA question, but I figured someone here might be able to point me in the right direction. I am designing a board with an Altera EP3C40 in the 240-pin QFP and a Cypress CY7C1792 static SRAM in the 100 pin QFP. I would like to operate the SRAM at 200MHz, so I know the routing needs to be som... 30 Mar 2010 07:12
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