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Does anyone ever use placement?
Do any of you advanced users ever use the floorplanning tools to do placement? I'm not talking about placing clock buffers or other individual items, I'm talking about ASIC style floorplanning for units and sub-units. I've asked AE's about that and the response is always to let the tool do placement. So I'm a... 7 Nov 2009 18:28
CPLD + MCU SoC from Cypress, free samples too!
both free samples and 49$ starterkit available, my should be airborn right now somewhere between Paris and my place. The CPLD is small, 190MC, but it still much more then the 16MC availabel in ADI's ADuCs or ST's uPSD devices. PSoC 5, Cortex based devices will probably only be available next year Antti ... 9 Nov 2009 19:57
Cyclone IV announced
Hi Altera is promising 25% more fabric speed than S6 with their new Cyclone IV Antti ... 9 Nov 2009 11:02
initialization issues on Spartan-3E after startup
Hi all, I'm having a problem where I'm not getting initialized how I expect after startup on a Spartan-3E. For example, one of my state machines is not in its initial state after startup, even though that state is coded all zeros. I don't have access to an external reset, so I have to generate one internall... 4 Nov 2009 16:23
ModelSim view internal signals in instantiated verilog modules
Hi all, I am simulating a entity with Modelsim (v6.5c). Modelsim only displays the input/output signals of the simulated top entity. When I run simulation Modelsim displays only changes of input/output signals of the top entity verilog module i.e. testbench (in objects window i.e. in wave window), but nothing ... 4 Nov 2009 07:29
Drigmorn3 Update
Schematics and UCF file are now available for our Spartan-6 board Drigmorn3. They can be found I'm hoping the manual will follow shortly in the next few days. John Adair Enterpoint Ltd. ... 2 Nov 2009 13:28
ML605 Evaluation Kit and FPGA Mezzanine Connectors (FMC) ?
Dear all, Has anyone ordered and used the ML605 Evaluation Kit? I noticed some attractive features like DDR3, PCIe Gen 2 and quite high FPGA capacity (241,152 logic cells). Before my ordering I would like to hear some comments. Another feature of this b... 20 Nov 2009 14:33
save data from adc in text file
hi all, i am using spartan 3e starter kit and i want to save the data captured from onboard adc(14 bit word) to a text the moment i use edk and write my results on the screen through rs232 using i can save the data in a text file? i tried by using fprintf but i get the following errors: ... 2 Dec 2009 03:13
V5 GTX Receiver Detect
Howdy All, Has anybody got the "Receiver Detect" feature to work in Virtex 5 VFX (with GTX transceivers) ? I have read "RocketIO GTX Transceiver User Guide" (UG198) from beginning to end, and am following the procedure described exactly as stated. I Am always getting "Receiver Not Present" status, even th... 3 Nov 2009 01:39
The Top of a free 40 Java Video online Tutorials
The Top of a free 40 Java Video online Tutorials ... 23 Oct 2009 15:33
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