FPGA

Xilinx DCM
Hi all, i am facing a problem with Xilinx DCM in DFS (not in DLL mode, in which you need to provide a feedback clock for phase alignmen). So my DCM is working in without feedback (internal as well as external) mode. I am trying to generate a 32Mhz clock from a 16Mhz input clock. Most of the time it works fine... 9 Jan 2006 11:12

ModelSim vsim-3601 message
Good day, I am trying to simulate a design for an Spartan3-200, on Webpack 7.1i SP4 with ModelSim XE III/Starter 6.0a. The design simulates perfectly for a functional simulation, running own .do file on ModelSim. However, if I run the same .do file on the simulation model generated with the "Generate Pos... 5 Jan 2006 07:07

Schematic Entry, Xilinx or Altera?
Greetings. I'm looking at doing some basic CPLD designs via Schematic Entry. Who has easier to learn/use schematic entry software, Xilinx or Altera? Both companies have CPLD's that meet my criteria, and design portability isn't an issue. Thank you. ... 12 Jan 2006 20:18

DCM spartan 3 variable frequency divider
Hello all, I am monica from germany.I am using xilinx spartan 3 FPGA.I have a peculiar problem with DCM in spartan 3 FPGA. The input frequency to the FPGA is from another system which gives a frequency arround 40 MHz and the FPGA is supposed to generate 1/8 th of the input frequency,I have implemented it by us... 4 Jan 2006 13:31

basic DSP with FPGA
Hi all, I'm new to FPGA stuff... i have an idea of making an audio spectrum analyzer implemented on a fpga, displaying data on a VGA monitor (spartan-3 starter kit). I guess I will need to filter the audio data in some way (band pass filters for each channel?), and I want to do it with the FPGA. That is, I'll get s... 6 Jan 2006 06:07

USB Printer Interface
Hallo, I'm developing a microcontroller based on Virtex-4FX. This system should send text to a USB printer. I think to use Cypress 67300 usb microcontroller. In what way could I send text to printer? I must use a RTOS like VxWorks to have usb driver support? Many Thanks Marco ... 29 Dec 2005 11:38

Virtex-4 CCLK termination
Hello all, I am new to this group, but it has already been a great resource.. thanks to all who post advice and suggestions! Good stuff. My current issue involves the Virtex-4 configuration pin called CCLK, which according to the V-4 Configuration Guide, "is different from previous Xilinx FPGAs" and requires ... 29 Dec 2005 11:06

Xilinx ISE Simulator
I have used other VHDL simulators, but I am now trying to run the Xilinx ISE simulator in Foundation 7.1 for the first time. As you can see below, I'm not having much success. I get the following message: Compiling vhdl file "<expunged path>Match8.vhd" in Library work. Entity <match8> compiled. Entity <matc... 3 Jan 2006 16:38

rs232 and picoblaze :)
Hi all ! I bought a S3board from digilent. I ran some program to test it, included a serial parallel multiplier :) I'm currently thinking of a new project "just for fun". When I learned vhdl at university, we start a project by coding a very simple processor, who looks like a very simple picoblaze. Do you think i... 18 Dec 2005 08:03

Altera based Video development board
Hi, I am looking for a FPGA based video prototype board with the following components: 1 Video decoder for 1 color composite Video in 1 FPGA preferably Altera About 1 Megabyte SRAM Some spare IO pins 1 Color composite video out The boards I have found are too expensive and have a lot of other hardware li... 23 Dec 2005 10:18