FPGA

Xilinx Legal
All: From our legal group- "Xilinx invests a significant amount in research and development, and vigorously protects and enforces its intellectual property rights resulting from its research and development efforts. It is also correct that when Xilinx licenses its software and tools, Xilinx prohibits its cu... 1 Feb 2006 10:53

HOW CAN I USE OPB EMC
hi can anyone tell me how can i use opb emc for controlling more than two memory banks. opb emc can be used for 8 memory banks each bank can have different data width. one memory bank already being used is external memory SRAM with 32 data width. but i want to add flash memory to EMC with a data width of 8. is there an... 28 Jan 2006 13:26

Microblaze data cache question
Hallo, I would insert multichannel opb sdram controller into a project. I would use xcl bus to access read/write datas into a integer matrix. I would know if every time I would perform read/write operations into a element of the matrix I need to: 1) disable data cache 2) init cache with address of matrix e... 27 Jan 2006 11:47

porting linux on ml403
Hi All, Iam new to xilinx platfrom. I was trying to port open source linux on Ml403 board. i tried to follow the instructions in the below link. http://www.klingauf.de/v2p/index.phtml i was getting errors when i was running bZimage. the .elf file was not getting created. Is there an alternative way of acheiv... 8 Feb 2006 19:24

LVDS Input buffer in VHDL (ISE)
I'm trying to instantiate some LVDS input buffers in VHDL using the following code: LVDS_lines: for i in 0 to 19 generate Inputs_LVDS : IBUFDS_LVDS_25_DT -- LVDS input buffer with Rterm active port map ( I => data_lvds_in_p(i), IB => data_lvds_in_n(i), O => d... 25 Jan 2006 06:19

Webpack 8.1i size
I have been evaluating this lately... and I see from the install that Xilinx still isn't acting very friendly on internet bandwidth. Anybody notice that the single file is 800 M.... but the individually file download is 1.8 G? I think its time for Xilinx to have a good look at this. How about looking at the w... 26 Jan 2006 05:18

data2bram and coregen
Hi, Does anyone have a hint on how to get data2bram and coregen memory to work together? I have an SoC with some 32bit memory made up of four 8bit memories generated with coregen, I've made a bmm file that defines the memory. I can run data2bram with the bmm file and an .elf file and if I set the output to v... 19 Jan 2006 21:47

EDK 8.1
When can we expect an EDK that corresponds to the newest ISE release? ... 19 Jan 2006 14:29

ISE8.1 on Linux, first impressions
I just installed ISE 8.1 on Linux and these are my first impressions: * Project Navigator finally feels like a native Linux program. Previous versions often felt unresponsive and slow. With this version I no longer feel an immediate urge to build everything with Makefiles. This is great! * Impact does n... 27 Jan 2006 03:23

xilinx free Sample Pack info now also on Xilinx own webpages
finally the free Sample Pack info is available from Xilinx directly http://www.xilinx.com/products/boards/s3esamplepack/index.htm there is no note that there is no availability in Europe so it still makes sense to contact the distributors also in Europe, maybe there is availabily. After one more attempt to us... 18 Jan 2006 08:14